mirror of git://gcc.gnu.org/git/gcc.git
Define __CET__ for -fcf-protection and remove -mibt
With revision 259496:
commit b1384095a7
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu Apr 19 15:15:04 2018 +0000
x86: Enable -fcf-protection with multi-byte NOPs
-mibt does nothing and can be removed. Define __CET__ to indicate level
protection with -fcf-protection:
(__CET__ & 1) != 0: -fcf-protection=branch or -fcf-protection=full
(__CET__ & 2) != 0: -fcf-protection=return or -fcf-protection=full
gcc/
PR target/85469
* common/config/i386/i386-common.c (OPTION_MASK_ISA_IBT_SET):
Removed.
(OPTION_MASK_ISA_IBT_UNSET): Likewise.
(ix86_handle_option): Don't handle OPT_mibt.
* config/i386/cet.h: Check __CET__ instead of __IBT__ and
__SHSTK__.
* config/i386/driver-i386.c (host_detect_local_cpu): Remove
has_ibt and ibt.
* config/i386/i386-c.c (ix86_target_macros_internal): Don't
check OPTION_MASK_ISA_IBT nor flag_cf_protection.
(ix86_target_macros): Define __CET__ with flag_cf_protection
for -fcf-protection.
* config/i386/i386.c (isa2_opts): Remove -mibt.
* config/i386/i386.h (TARGET_IBT): Removed.
(TARGET_IBT_P): Likewise.
(ix86_valid_target_attribute_inner_p): Don't check OPT_mibt.
* config/i386/i386.md (nop_endbr): Don't check TARGET_IBT.
* config/i386/i386.opt (mcet): Update help message.
(mshstk): Likewise.
(mibt): Removed.
* doc/invoke.texi: Remove -mibt. Document __CET__. Document
-mcet as an alias for -mshstk.
gcc/testsuite/
PR target/85469
* gcc.target/i386/pr85044.c (dg-options): Remove -mibt.
* gcc.target/i386/sse-26.c (dg-options): Remove -mno-ibt.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@259522 138bc75d-0d04-0410-961f-82ee72b054a4
This commit is contained in:
hjl
parent
fa95965bab
commit
d59cfa9a40
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@ -1,3 +1,29 @@
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2018-04-20 H.J. Lu <hongjiu.lu@intel.com>
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PR target/85469
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* common/config/i386/i386-common.c (OPTION_MASK_ISA_IBT_SET):
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Removed.
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(OPTION_MASK_ISA_IBT_UNSET): Likewise.
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(ix86_handle_option): Don't handle OPT_mibt.
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* config/i386/cet.h: Check __CET__ instead of __IBT__ and
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__SHSTK__.
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* config/i386/driver-i386.c (host_detect_local_cpu): Remove
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has_ibt and ibt.
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* config/i386/i386-c.c (ix86_target_macros_internal): Don't
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check OPTION_MASK_ISA_IBT nor flag_cf_protection.
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(ix86_target_macros): Define __CET__ with flag_cf_protection
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for -fcf-protection.
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* config/i386/i386.c (isa2_opts): Remove -mibt.
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* config/i386/i386.h (TARGET_IBT): Removed.
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(TARGET_IBT_P): Likewise.
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(ix86_valid_target_attribute_inner_p): Don't check OPT_mibt.
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* config/i386/i386.md (nop_endbr): Don't check TARGET_IBT.
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* config/i386/i386.opt (mcet): Update help message.
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(mshstk): Likewise.
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(mibt): Removed.
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* doc/invoke.texi: Remove -mibt. Document __CET__. Document
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-mcet as an alias for -mshstk.
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2018-04-20 Richard Biener <rguenther@suse.de>
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PR middle-end/85475
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@ -147,7 +147,6 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_PKU_SET OPTION_MASK_ISA_PKU
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#define OPTION_MASK_ISA_RDPID_SET OPTION_MASK_ISA_RDPID
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#define OPTION_MASK_ISA_GFNI_SET OPTION_MASK_ISA_GFNI
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#define OPTION_MASK_ISA_IBT_SET OPTION_MASK_ISA_IBT
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#define OPTION_MASK_ISA_SHSTK_SET OPTION_MASK_ISA_SHSTK
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#define OPTION_MASK_ISA_VAES_SET OPTION_MASK_ISA_VAES
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#define OPTION_MASK_ISA_VPCLMULQDQ_SET OPTION_MASK_ISA_VPCLMULQDQ
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@ -224,7 +223,6 @@ along with GCC; see the file COPYING3. If not see
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#define OPTION_MASK_ISA_PKU_UNSET OPTION_MASK_ISA_PKU
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#define OPTION_MASK_ISA_RDPID_UNSET OPTION_MASK_ISA_RDPID
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#define OPTION_MASK_ISA_GFNI_UNSET OPTION_MASK_ISA_GFNI
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#define OPTION_MASK_ISA_IBT_UNSET OPTION_MASK_ISA_IBT
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#define OPTION_MASK_ISA_SHSTK_UNSET OPTION_MASK_ISA_SHSTK
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#define OPTION_MASK_ISA_VAES_UNSET OPTION_MASK_ISA_VAES
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#define OPTION_MASK_ISA_VPCLMULQDQ_UNSET OPTION_MASK_ISA_VPCLMULQDQ
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@ -546,21 +544,6 @@ ix86_handle_option (struct gcc_options *opts,
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return true;
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case OPT_mcet:
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case OPT_mibt:
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if (value)
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{
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opts->x_ix86_isa_flags2 |= OPTION_MASK_ISA_IBT_SET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_IBT_SET;
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}
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else
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{
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opts->x_ix86_isa_flags2 &= ~OPTION_MASK_ISA_IBT_UNSET;
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opts->x_ix86_isa_flags2_explicit |= OPTION_MASK_ISA_IBT_UNSET;
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}
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if (code != OPT_mcet)
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return true;
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/* fall through. */
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case OPT_mshstk:
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if (value)
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{
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@ -32,7 +32,7 @@
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#ifdef __ASSEMBLER__
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# ifdef __IBT__
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# if defined __CET__ && (__CET__ & 1) != 0
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# ifdef __x86_64__
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# define _CET_ENDBR endbr64
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# else
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@ -44,14 +44,14 @@
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# ifdef __ELF__
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# ifdef __CET__
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# ifdef __IBT__
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# if (__CET__ & 1) != 0
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/* GNU_PROPERTY_X86_FEATURE_1_IBT. */
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# define __PROPERTY_IBT 0x1
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# else
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# define __PROPERTY_IBT 0x0
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# endif
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# ifdef __SHSTK__
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# if (__CET__ & 2) != 0
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/* GNU_PROPERTY_X86_FEATURE_1_SHSTK. */
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# define __PROPERTY_SHSTK 0x2
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# else
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@ -420,7 +420,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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unsigned int has_avx5124fmaps = 0, has_avx5124vnniw = 0;
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unsigned int has_gfni = 0, has_avx512vbmi2 = 0;
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unsigned int has_avx512bitalg = 0;
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unsigned int has_ibt = 0, has_shstk = 0;
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unsigned int has_shstk = 0;
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unsigned int has_avx512vnni = 0, has_vaes = 0;
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unsigned int has_vpclmulqdq = 0;
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unsigned int has_movdiri = 0, has_movdir64b = 0;
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@ -526,7 +526,6 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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has_avx5124fmaps = edx & bit_AVX5124FMAPS;
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has_shstk = ecx & bit_SHSTK;
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has_ibt = edx & bit_IBT;
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has_pconfig = edx & bit_PCONFIG;
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}
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@ -1095,7 +1094,6 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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const char *pku = has_pku ? " -mpku" : " -mno-pku";
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const char *rdpid = has_rdpid ? " -mrdpid" : " -mno-rdpid";
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const char *gfni = has_gfni ? " -mgfni" : " -mno-gfni";
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const char *ibt = has_ibt ? " -mibt" : " -mno-ibt";
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const char *shstk = has_shstk ? " -mshstk" : " -mno-shstk";
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const char *vaes = has_vaes ? " -mvaes" : " -mno-vaes";
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const char *vpclmulqdq = has_vpclmulqdq ? " -mvpclmulqdq" : " -mno-vpclmulqdq";
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@ -1112,7 +1110,7 @@ const char *host_detect_local_cpu (int argc, const char **argv)
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avx512cd, avx512pf, prefetchwt1, clflushopt,
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xsavec, xsaves, avx512dq, avx512bw, avx512vl,
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avx512ifma, avx512vbmi, avx5124fmaps, avx5124vnniw,
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clwb, mwaitx, clzero, pku, rdpid, gfni, ibt, shstk,
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clwb, mwaitx, clzero, pku, rdpid, gfni, shstk,
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avx512vbmi2, avx512vnni, vaes, vpclmulqdq,
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avx512bitalg, movdiri, movdir64b, NULL);
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}
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@ -499,20 +499,8 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_flag,
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def_or_undef (parse_in, "__RDPID__");
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if (isa_flag & OPTION_MASK_ISA_GFNI)
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def_or_undef (parse_in, "__GFNI__");
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if ((isa_flag2 & OPTION_MASK_ISA_IBT)
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|| (flag_cf_protection & CF_BRANCH))
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{
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def_or_undef (parse_in, "__IBT__");
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if (flag_cf_protection != CF_NONE)
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def_or_undef (parse_in, "__CET__");
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}
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if ((isa_flag & OPTION_MASK_ISA_SHSTK)
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|| (flag_cf_protection & CF_RETURN))
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{
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def_or_undef (parse_in, "__SHSTK__");
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if (flag_cf_protection != CF_NONE)
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def_or_undef (parse_in, "__CET__");
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}
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if ((isa_flag & OPTION_MASK_ISA_SHSTK))
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def_or_undef (parse_in, "__SHSTK__");
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if (isa_flag2 & OPTION_MASK_ISA_VAES)
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def_or_undef (parse_in, "__VAES__");
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if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ)
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@ -680,6 +668,10 @@ ix86_target_macros (void)
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cpp_define (parse_in, "__SEG_FS");
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cpp_define (parse_in, "__SEG_GS");
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if (flag_cf_protection != CF_NONE)
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cpp_define_formatted (parse_in, "__CET__=%d",
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flag_cf_protection & ~CF_SET);
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}
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@ -2766,7 +2766,6 @@ ix86_target_string (HOST_WIDE_INT isa, HOST_WIDE_INT isa2,
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{ "-msgx", OPTION_MASK_ISA_SGX },
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{ "-mavx5124vnniw", OPTION_MASK_ISA_AVX5124VNNIW },
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{ "-mavx5124fmaps", OPTION_MASK_ISA_AVX5124FMAPS },
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{ "-mibt", OPTION_MASK_ISA_IBT },
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{ "-mhle", OPTION_MASK_ISA_HLE },
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{ "-mmovbe", OPTION_MASK_ISA_MOVBE },
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{ "-mclzero", OPTION_MASK_ISA_CLZERO },
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@ -5377,7 +5376,6 @@ ix86_valid_target_attribute_inner_p (tree args, char *p_strings[],
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IX86_ATTR_ISA ("clwb", OPT_mclwb),
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IX86_ATTR_ISA ("rdpid", OPT_mrdpid),
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IX86_ATTR_ISA ("gfni", OPT_mgfni),
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IX86_ATTR_ISA ("ibt", OPT_mibt),
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IX86_ATTR_ISA ("shstk", OPT_mshstk),
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IX86_ATTR_ISA ("vaes", OPT_mvaes),
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IX86_ATTR_ISA ("vpclmulqdq", OPT_mvpclmulqdq),
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@ -183,8 +183,6 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
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#define TARGET_MWAITX_P(x) TARGET_ISA_MWAITX_P(x)
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#define TARGET_PKU TARGET_ISA_PKU
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#define TARGET_PKU_P(x) TARGET_ISA_PKU_P(x)
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#define TARGET_IBT TARGET_ISA_IBT
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#define TARGET_IBT_P(x) TARGET_ISA_IBT_P(x)
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#define TARGET_SHSTK TARGET_ISA_SHSTK
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#define TARGET_SHSTK_P(x) TARGET_ISA_SHSTK_P(x)
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#define TARGET_MOVDIRI TARGET_ISA_MOVDIRI
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@ -20332,7 +20332,7 @@
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(define_insn "nop_endbr"
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[(unspec_volatile [(const_int 0)] UNSPECV_NOP_ENDBR)]
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"TARGET_IBT || (flag_cf_protection & CF_BRANCH)"
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"(flag_cf_protection & CF_BRANCH)"
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"*
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{ return (TARGET_64BIT)? \"endbr64\" : \"endbr32\"; }"
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[(set_attr "length" "4")
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@ -1008,17 +1008,13 @@ Generate code which uses only the general registers.
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mcet
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Target Report Var(flag_cet) Init(0)
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Support Control-flow Enforcement Technology (CET) built-in functions.
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mibt
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Target Report Mask(ISA_IBT) Var(ix86_isa_flags2) Save
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Specifically enable indirect branch tracking built-in functions from
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Control-flow Enforcement Technology (CET).
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Enable shadow stack built-in functions from Control-flow Enforcement
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Technology (CET).
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mshstk
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Target Report Mask(ISA_SHSTK) Var(ix86_isa_flags) Save
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Specifically enable shadow stack built-in functions from Control-flow
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Enforcement Technology (CET).
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Enable shadow stack built-in functions from Control-flow Enforcement
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Technology (CET).
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mcet-switch
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Target Report Undocumented Var(flag_cet_switch) Init(0)
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@ -1261,7 +1261,7 @@ See RS/6000 and PowerPC Options.
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-msse4a -m3dnow -m3dnowa -mpopcnt -mabm -mbmi -mtbm -mfma4 -mxop @gol
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-mlzcnt -mbmi2 -mfxsr -mxsave -mxsaveopt -mrtm -mlwp -mmpx @gol
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-mmwaitx -mclzero -mpku -mthreads -mgfni -mvaes @gol
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-mcet -mibt -mshstk -mforce-indirect-call -mavx512vbmi2 @gol
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-mcet -mshstk -mforce-indirect-call -mavx512vbmi2 @gol
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-mvpclmulqdq -mavx512bitalg -mmovdiri -mmovdir64b -mavx512vpopcntdq @gol
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-mms-bitfields -mno-align-stringops -minline-all-stringops @gol
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-minline-stringops-dynamically -mstringop-strategy=@var{alg} @gol
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@ -11829,6 +11829,11 @@ function. The value @code{full} is an alias for specifying both
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@code{branch} and @code{return}. The value @code{none} turns off
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instrumentation.
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The macro @code{__CET__} is defined when @option{-fcf-protection} is
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used. The first bit of @code{__CET__} is set to 1 for the value
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@code{branch} and the second bit of @code{__CET__} is set to 1 for
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the @code{return}.
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You can also use the @code{nocf_check} attribute to identify
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which functions and calls should be skipped from instrumentation
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(@pxref{Function Attributes}).
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@ -27349,11 +27354,6 @@ supported architecture, using the appropriate flags. In particular,
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the file containing the CPU detection code should be compiled without
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these options.
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The @option{-mcet} option turns on the @option{-mibt} and @option{-mshstk}
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options. The compiler provides a number of built-in functions for
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fine-grained control in a CET-based application. See
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@xref{x86 Built-in Functions}, for more information.
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@item -mdump-tune-features
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@opindex mdump-tune-features
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This option instructs GCC to dump the names of the x86 performance
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@ -27446,19 +27446,13 @@ see @ref{Other Builtins} for details.
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This option enables use of the @code{movbe} instruction to implement
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@code{__builtin_bswap32} and @code{__builtin_bswap64}.
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@item -mibt
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@opindex mibt
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This option enables indirect branch tracking built-in functions from
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x86 Control-flow Enforcement Technology (CET). The option
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@option{-mibt} is on by default when the @code{-mcet} option is
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specified.
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@item -mshstk
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@itemx -mcet
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@opindex mshstk
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This option enables shadow stack built-in functions from x86
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Control-flow Enforcement Technology (CET). The option
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@option{-mshstk} is on by default when the @option{-mcet} option is
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specified.
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@opindex mcet
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The @option{-mshstk} option enables shadow stack built-in functions
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from x86 Control-flow Enforcement Technology (CET). The @option{-mcet}
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option is an alias for the @option{-mshstk} option.
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@item -mcrc32
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@opindex mcrc32
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@ -1,3 +1,9 @@
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2018-04-20 H.J. Lu <hongjiu.lu@intel.com>
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PR target/85469
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* gcc.target/i386/pr85044.c (dg-options): Remove -mibt.
|
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* gcc.target/i386/sse-26.c (dg-options): Remove -mno-ibt.
|
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2018-04-20 Richard Biener <rguenther@suse.de>
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PR middle-end/85475
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|
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@ -1,5 +1,5 @@
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/* { dg-do run { target cet } } */
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/* { dg-options "-O2 -fcf-protection=branch -mibt" } */
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/* { dg-options "-O2 -fcf-protection=branch" } */
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void callme (void (*callback) (void));
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@ -1,5 +1,5 @@
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/* { dg-do compile } */
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/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse2 -mmmx -mno-sse3 -mno-3dnow -mno-fma -mno-fxsr -mno-xsave -mno-rtm -mno-prfchw -mno-rdseed -mno-adx -mno-prefetchwt1 -mno-clflushopt -mno-xsavec -mno-xsaves -mno-clwb -mno-mwaitx -mno-clzero -mno-pku -mno-rdpid -mno-gfni -mno-ibt -mno-shstk -mno-vaes -mno-vpclmulqdq" } */
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/* { dg-options "-O2 -Werror-implicit-function-declaration -march=k8 -msse2 -mmmx -mno-sse3 -mno-3dnow -mno-fma -mno-fxsr -mno-xsave -mno-rtm -mno-prfchw -mno-rdseed -mno-adx -mno-prefetchwt1 -mno-clflushopt -mno-xsavec -mno-xsaves -mno-clwb -mno-mwaitx -mno-clzero -mno-pku -mno-rdpid -mno-gfni -mno-shstk -mno-vaes -mno-vpclmulqdq" } */
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/* { dg-add-options bind_pic_locally } */
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||||
|
||||
#include "sse-13.c"
|
||||
|
|
|
|||
Loading…
Reference in New Issue