mirror of git://gcc.gnu.org/git/gcc.git
arm.c (neon_valid_immediate): Allow const_int.
2012-04-30 Andrew Stubbs <ams@codesourcery.com> * config/arm/arm.c (neon_valid_immediate): Allow const_int. (arm_print_operand): Add 'x' format. * config/arm/constraints.md (Dn): Allow const_int. * config/arm/neon.md (neon_mov<mode>): Use VDX to allow DImode. Use 'x' format to print constants. * config/arm/predicates.md (imm_for_neon_mov_operand): Allow const_int. * config/arm/vfp.md (movdi_vfp): Disable for const_int when neon is enabled. (movdi_vfp_cortexa8): Likewise. From-SVN: r186983
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Andrew Stubbs
Andrew Stubbs
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@ -1,3 +1,15 @@
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2012-04-30 Andrew Stubbs <ams@codesourcery.com>
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* config/arm/arm.c (neon_valid_immediate): Allow const_int.
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(arm_print_operand): Add 'x' format.
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* config/arm/constraints.md (Dn): Allow const_int.
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* config/arm/neon.md (neon_mov<mode>): Use VDX to allow DImode.
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Use 'x' format to print constants.
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* config/arm/predicates.md (imm_for_neon_mov_operand): Allow const_int.
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* config/arm/vfp.md (movdi_vfp): Disable for const_int when neon
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is enabled.
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(movdi_vfp_cortexa8): Likewise.
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2012-04-30 Ian Bolton <ian.bolton@arm.com>
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Sameera Deshpande <sameera.deshpande@arm.com>
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Greta Yorsh <greta.yorsh@arm.com>
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@ -8911,11 +8911,25 @@ neon_valid_immediate (rtx op, enum machine_mode mode, int inverse,
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break; \
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}
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unsigned int i, elsize = 0, idx = 0, n_elts = CONST_VECTOR_NUNITS (op);
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unsigned int innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
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unsigned int i, elsize = 0, idx = 0, n_elts;
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unsigned int innersize;
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unsigned char bytes[16];
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int immtype = -1, matches;
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unsigned int invmask = inverse ? 0xff : 0;
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bool vector = GET_CODE (op) == CONST_VECTOR;
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if (vector)
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{
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n_elts = CONST_VECTOR_NUNITS (op);
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innersize = GET_MODE_SIZE (GET_MODE_INNER (mode));
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}
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else
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{
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n_elts = 1;
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if (mode == VOIDmode)
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mode = DImode;
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innersize = GET_MODE_SIZE (mode);
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}
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/* Vectors of float constants. */
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if (GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
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@ -8951,7 +8965,7 @@ neon_valid_immediate (rtx op, enum machine_mode mode, int inverse,
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/* Splat vector constant out into a byte vector. */
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for (i = 0; i < n_elts; i++)
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{
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rtx el = CONST_VECTOR_ELT (op, i);
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rtx el = vector ? CONST_VECTOR_ELT (op, i) : op;
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unsigned HOST_WIDE_INT elpart;
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unsigned int part, parts;
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@ -17579,6 +17593,19 @@ arm_print_operand (FILE *stream, rtx x, int code)
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}
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return;
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/* An integer that we want to print in HEX. */
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case 'x':
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switch (GET_CODE (x))
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{
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case CONST_INT:
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fprintf (stream, "#" HOST_WIDE_INT_PRINT_HEX, INTVAL (x));
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break;
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default:
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output_operand_lossage ("Unsupported operand for code '%c'", code);
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}
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return;
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case 'B':
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if (GET_CODE (x) == CONST_INT)
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{
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@ -260,9 +260,9 @@
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(define_constraint "Dn"
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"@internal
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In ARM/Thumb-2 state a const_vector which can be loaded with a Neon vmov
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immediate instruction."
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(and (match_code "const_vector")
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In ARM/Thumb-2 state a const_vector or const_int which can be loaded with a
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Neon vmov immediate instruction."
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(and (match_code "const_vector,const_int")
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(match_test "TARGET_32BIT
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&& imm_for_neon_mov_operand (op, GET_MODE (op))")))
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@ -156,9 +156,9 @@
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(define_attr "vqh_mnem" "vadd,vmin,vmax" (const_string "vadd"))
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(define_insn "*neon_mov<mode>"
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[(set (match_operand:VD 0 "nonimmediate_operand"
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[(set (match_operand:VDX 0 "nonimmediate_operand"
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"=w,Uv,w, w, ?r,?w,?r,?r, ?Us")
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(match_operand:VD 1 "general_operand"
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(match_operand:VDX 1 "general_operand"
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" w,w, Dn,Uvi, w, r, r, Usi,r"))]
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"TARGET_NEON
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&& (register_operand (operands[0], <MODE>mode)
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@ -177,7 +177,7 @@
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if (width == 0)
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return "vmov.f32\t%P0, %1 @ <mode>";
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else
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sprintf (templ, "vmov.i%d\t%%P0, %%1 @ <mode>", width);
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sprintf (templ, "vmov.i%d\t%%P0, %%x1 @ <mode>", width);
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return templ;
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}
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@ -504,7 +504,7 @@
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})
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(define_predicate "imm_for_neon_mov_operand"
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(match_code "const_vector")
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(match_code "const_vector,const_int")
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{
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return neon_immediate_valid_for_move (op, mode, NULL, NULL);
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})
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@ -138,7 +138,9 @@
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(match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))]
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"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune != cortexa8
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&& ( register_operand (operands[0], DImode)
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|| register_operand (operands[1], DImode))"
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|| register_operand (operands[1], DImode))
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&& !(TARGET_NEON && CONST_INT_P (operands[1])
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&& neon_immediate_valid_for_move (operands[1], DImode, NULL, NULL))"
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"*
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switch (which_alternative)
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{
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@ -187,7 +189,9 @@
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(match_operand:DI 1 "di_operand" "r,rDa,Db,Dc,mi,mi,r,r,w,w,Uvi,w"))]
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"TARGET_32BIT && TARGET_HARD_FLOAT && TARGET_VFP && arm_tune == cortexa8
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&& ( register_operand (operands[0], DImode)
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|| register_operand (operands[1], DImode))"
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|| register_operand (operands[1], DImode))
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&& !(TARGET_NEON && CONST_INT_P (operands[1])
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&& neon_immediate_valid_for_move (operands[1], DImode, NULL, NULL))"
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"*
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switch (which_alternative)
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{
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