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[AArch64] Remove unnecessary files. 

2014-11-12  Tejas Belagod  <tejas.belagod@arm.com>

        * Makefile.in (TEXI_GCC_FILES): Remove arm-acle-intrinsics.texi,
        arm-neon-intrinsics.texi, aarch64-acle-intrinsics.texi.
        * doc/aarch64-acle-intrinsics.texi: Remove.
        * doc/arm-acle-intrinsics.texi: Remove.
        * doc/arm-neon-intrinsics.texi: Remove.
        * doc/extend.texi: Consolidate sections AArch64 intrinsics,
        ARM NEON Intrinsics, ARM ACLE Intrinsics into one ARM C Language
        Extension section. Add references to public ACLE specification.

From-SVN: r217406
This commit is contained in:
Tejas Belagod 2014-11-12 08:46:05 +00:00
parent 3f15527337
commit 02c0ac4584
3 changed files with 0 additions and 12118 deletions
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55
gcc/doc/aarch64-acle-intrinsics.texi
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@ -1,55 +0,0 @@
@c Copyright (C) 2014 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
@subsubsection CRC32 intrinsics
These intrinsics are available when the CRC32 architecture extension is
specified, e.g. when the @option{-march=armv8-a+crc} switch is used, or when
the target processor specified with @option{-mcpu} supports it.
@itemize @bullet
@item uint32_t __crc32b (uint32_t, uint8_t)
@*@emph{Form of expected instruction(s):} @code{crc32b @var{w0}, @var{w1}, @var{w2}}
@end itemize
@itemize @bullet
@item uint32_t __crc32h (uint32_t, uint16_t)
@*@emph{Form of expected instruction(s):} @code{crc32h @var{w0}, @var{w1}, @var{w2}}
@end itemize
@itemize @bullet
@item uint32_t __crc32w (uint32_t, uint32_t)
@*@emph{Form of expected instruction(s):} @code{crc32w @var{w0}, @var{w1}, @var{w2}}
@end itemize
@itemize @bullet
@item uint32_t __crc32d (uint32_t, uint64_t)
@*@emph{Form of expected instruction(s):} @code{crc32x @var{w0}, @var{w1}, @var{x2}}
@end itemize
@itemize @bullet
@item uint32_t __crc32cb (uint32_t, uint8_t)
@*@emph{Form of expected instruction(s):} @code{crc32cb @var{w0}, @var{w1}, @var{w2}}
@end itemize
@itemize @bullet
@item uint32_t __crc32ch (uint32_t, uint16_t)
@*@emph{Form of expected instruction(s):} @code{crc32ch @var{w0}, @var{w1}, @var{w2}}
@end itemize
@itemize @bullet
@item uint32_t __crc32cw (uint32_t, uint32_t)
@*@emph{Form of expected instruction(s):} @code{crc32cw @var{w0}, @var{w1}, @var{w2}}
@end itemize
@itemize @bullet
@item uint32_t __crc32cd (uint32_t, uint64_t)
@*@emph{Form of expected instruction(s):} @code{crc32cx @var{w0}, @var{w1}, @var{x2}}
@end itemize

57
gcc/doc/arm-acle-intrinsics.texi
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@ -1,57 +0,0 @@
@c Copyright (C) 2013-2014 Free Software Foundation, Inc.
@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.
@subsubsection CRC32 intrinsics
These intrinsics are available when the CRC32 architecture extension is
specified, e.g. when the @option{-march=armv8-a+crc} switch is used, or when
the target processor specified with @option{-mcpu} supports it.
@itemize @bullet
@item uint32_t __crc32b (uint32_t, uint8_t)
@*@emph{Form of expected instruction(s):} @code{crc32b @var{r0}, @var{r0}, @var{r0}}
@end itemize
@itemize @bullet
@item uint32_t __crc32h (uint32_t, uint16_t)
@*@emph{Form of expected instruction(s):} @code{crc32h @var{r0}, @var{r0}, @var{r0}}
@end itemize
@itemize @bullet
@item uint32_t __crc32w (uint32_t, uint32_t)
@*@emph{Form of expected instruction(s):} @code{crc32w @var{r0}, @var{r0}, @var{r0}}
@end itemize
@itemize @bullet
@item uint32_t __crc32d (uint32_t, uint64_t)
@*@emph{Form of expected instruction(s):} Two @code{crc32w @var{r0}, @var{r0}, @var{r0}}
instructions.
@end itemize
@itemize @bullet
@item uint32_t __crc32cb (uint32_t, uint8_t)
@*@emph{Form of expected instruction(s):} @code{crc32cb @var{r0}, @var{r0}, @var{r0}}
@end itemize
@itemize @bullet
@item uint32_t __crc32ch (uint32_t, uint16_t)
@*@emph{Form of expected instruction(s):} @code{crc32ch @var{r0}, @var{r0}, @var{r0}}
@end itemize
@itemize @bullet
@item uint32_t __crc32cw (uint32_t, uint32_t)
@*@emph{Form of expected instruction(s):} @code{crc32cw @var{r0}, @var{r0}, @var{r0}}
@end itemize
@itemize @bullet
@item uint32_t __crc32cd (uint32_t, uint64_t)
@*@emph{Form of expected instruction(s):} Two @code{crc32cw @var{r0}, @var{r0}, @var{r0}}
instructions.
@end itemize

12006
gcc/doc/arm-neon-intrinsics.texi
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