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lib1funcs.asm (ctzsi2): New function. 

* arm/lib1funcs.asm (ctzsi2): New function.
* arm/t-elf (LIB1ASMFUNCS): Add _ctzsi2.
* arm/t-linux (LIB1ASMFUNCS): Likewise.
* arm/t-strongarm-elf (LIB1ASMFUNCS): Likewise.
* arm/t-symbian (LIB1ASMFUNCS): Likewise.
* arm/t-vxworks (LIB1ASMFUNCS): Likewise.
* arm/t-wince-pe (LIB1ASMFUNCS): Likewise.

From-SVN: r185698
This commit is contained in:
Richard Earnshaw 2012-03-22 15:14:46 +00:00 committed by Richard Earnshaw
parent b4e93f4518
commit 06ea73711d
8 changed files with 80 additions and 6 deletions
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10
libgcc/ChangeLog
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@ -1,3 +1,13 @@
2012-03-22 Richard Earnshaw <rearnsha@arm.com>
* arm/lib1funcs.asm (ctzsi2): New function.
* arm/t-elf (LIB1ASMFUNCS): Add _ctzsi2.
* arm/t-linux (LIB1ASMFUNCS): Likewise.
* arm/t-strongarm-elf (LIB1ASMFUNCS): Likewise.
* arm/t-symbian (LIB1ASMFUNCS): Likewise.
* arm/t-vxworks (LIB1ASMFUNCS): Likewise.
* arm/t-wince-pe (LIB1ASMFUNCS): Likewise.
2012-03-21 Andreas Tobler <andreast@fgznet.ch> 2012-03-21 Andreas Tobler <andreast@fgznet.ch>
* config.host: Add bits to support powerpc64-*-freebsd*. * config.host: Add bits to support powerpc64-*-freebsd*.

64
libgcc/config/arm/lib1funcs.S
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@ -1594,6 +1594,70 @@ ARM_FUNC_START clzdi2
#endif #endif
#endif /* L_clzdi2 */ #endif /* L_clzdi2 */
#ifdef L_ctzsi2
#if defined(__ARM_ARCH_6M__)
FUNC_START ctzsi2
neg r1, r0
and r0, r0, r1
mov r1, #28
mov r3, #1
lsl r3, r3, #16
cmp r0, r3 /* 0x10000 */
bcc 2f
lsr r0, r0, #16
sub r1, r1, #16
2: lsr r3, r3, #8
cmp r0, r3 /* #0x100 */
bcc 2f
lsr r0, r0, #8
sub r1, r1, #8
2: lsr r3, r3, #4
cmp r0, r3 /* #0x10 */
bcc 2f
lsr r0, r0, #4
sub r1, r1, #4
2: adr r2, 1f
ldrb r0, [r2, r0]
sub r0, r0, r1
bx lr
.align 2
1:
.byte 27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31
FUNC_END ctzsi2
#else
ARM_FUNC_START ctzsi2
rsb r1, r0, #0
and r0, r0, r1
# if defined(HAVE_ARM_CLZ)
clz r0, r0
rsb r0, r0, #31
RET
# else
mov r1, #28
cmp r0, #0x10000
do_it cs, t
movcs r0, r0, lsr #16
subcs r1, r1, #16
cmp r0, #0x100
do_it cs, t
movcs r0, r0, lsr #8
subcs r1, r1, #8
cmp r0, #0x10
do_it cs, t
movcs r0, r0, lsr #4
subcs r1, r1, #4
adr r2, 1f
ldrb r0, [r2, r0]
sub r0, r0, r1
RET
.align 2
1:
.byte 27, 28, 29, 29, 30, 30, 30, 30, 31, 31, 31, 31, 31, 31, 31, 31
# endif /* !HAVE_ARM_CLZ */
FUNC_END ctzsi2
#endif
#endif /* L_clzsi2 */
/* ------------------------------------------------------------------------ */ /* ------------------------------------------------------------------------ */
/* These next two sections are here despite the fact that they contain Thumb /* These next two sections are here despite the fact that they contain Thumb
assembler because their presence allows interworked code to be linked even assembler because their presence allows interworked code to be linked even

2
libgcc/config/arm/t-elf
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@ -10,7 +10,7 @@ LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func \
_arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \ _arm_truncdfsf2 _arm_negsf2 _arm_addsubsf3 _arm_muldivsf3 \
_arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \ _arm_cmpsf2 _arm_unordsf2 _arm_fixsfsi _arm_fixunssfsi \
_arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \ _arm_floatdidf _arm_floatdisf _arm_floatundidf _arm_floatundisf \
_clzsi2 _clzdi2 _clzsi2 _clzdi2 _ctzsi2
# Currently there is a bug somewhere in GCC's alias analysis # Currently there is a bug somewhere in GCC's alias analysis
# or scheduling code that is breaking _fpmul_parts in fp-bit.c. # or scheduling code that is breaking _fpmul_parts in fp-bit.c.

2
libgcc/config/arm/t-linux
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@ -1,6 +1,6 @@
LIB1ASMSRC = arm/lib1funcs.S LIB1ASMSRC = arm/lib1funcs.S
LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \ LIB1ASMFUNCS = _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_lnx _clzsi2 _clzdi2 \
_arm_addsubdf3 _arm_addsubsf3 _ctzsi2 _arm_addsubdf3 _arm_addsubsf3
# Just for these, we omit the frame pointer since it makes such a big # Just for these, we omit the frame pointer since it makes such a big
# difference. # difference.

2
libgcc/config/arm/t-strongarm-elf
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@ -1,4 +1,4 @@
LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _clzsi2 _clzdi2 LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _clzsi2 _clzdi2 _ctzsi2
# Currently there is a bug somewhere in GCC's alias analysis # Currently there is a bug somewhere in GCC's alias analysis
# or scheduling code that is breaking _fpmul_parts in fp-bit.c. # or scheduling code that is breaking _fpmul_parts in fp-bit.c.

2
libgcc/config/arm/t-symbian
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@ -1,4 +1,4 @@
LIB1ASMFUNCS += _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 LIB1ASMFUNCS += _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _ctzsi2
# These functions have __aeabi equivalents and will never be called by GCC. # These functions have __aeabi equivalents and will never be called by GCC.
# By putting them in LIB1ASMFUNCS, we avoid the standard libgcc2.c code being # By putting them in LIB1ASMFUNCS, we avoid the standard libgcc2.c code being

2
libgcc/config/arm/t-vxworks
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@ -1 +1 @@
LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _bb_init_func _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _ctzsi2

2
libgcc/config/arm/t-wince-pe
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@ -1 +1 @@
LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 LIB1ASMFUNCS += _udivsi3 _divsi3 _umodsi3 _modsi3 _dvmd_tls _call_via_rX _interwork_call_via_rX _clzsi2 _clzdi2 _ctzsi2