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sol2-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Do not set fs->signal_frame for SIGFPE raised for IEEE-754 exceptions. 

* config/sparc/sol2-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Do not set
	fs->signal_frame for SIGFPE raised for IEEE-754 exceptions.
	* config/i386/sol2-unwind.h (x86_fallback_frame_state): Likewise.

From-SVN: r199381
This commit is contained in:
Eric Botcazou 2013-05-28 13:52:50 +00:00 committed by Eric Botcazou
parent fbd7e87731
commit 0ba045df8f
5 changed files with 46 additions and 2 deletions
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4
gcc/testsuite/ChangeLog
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@ -1,3 +1,7 @@
2013-05-28 Eric Botcazou <ebotcazou@adacore.com>
* gnat.dg/fp_exception.adb: New test.
2013-05-28 Richard Biener <rguenther@suse.de> 2013-05-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/56787 PR tree-optimization/56787

24
gcc/testsuite/gnat.dg/fp_exception.adb Normal file
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@ -0,0 +1,24 @@
-- { dg-do run { target *-*-solaris2.* } }
-- { dg-options "-ftrapping-math" }
procedure FP_Exception is
type my_fixed is digits 15;
for my_fixed'size use 64;
fixed1 : my_fixed := 1.0;
fixed2 : my_fixed := -0.0;
mask_all : constant integer := 16#1F#;
procedure fpsetmask(mask : in integer);
pragma IMPORT (C, fpsetmask, "fpsetmask");
begin
-- Mask all floating point exceptions so they can be trapped
fpsetmask (mask_all);
fixed1 := fixed1 / fixed2;
exception
when others => null;
end;

6
libgcc/ChangeLog
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@ -1,3 +1,9 @@
2013-05-28 Eric Botcazou <ebotcazou@adacore.com>
* config/sparc/sol2-unwind.h (MD_FALLBACK_FRAME_STATE_FOR): Do not set
fs->signal_frame for SIGFPE raised for IEEE-754 exceptions.
* config/i386/sol2-unwind.h (x86_fallback_frame_state): Likewise.
2013-05-22 Eric Botcazou <ebotcazou@adacore.com> 2013-05-22 Eric Botcazou <ebotcazou@adacore.com>
* config.host (powerpc-*-elf*): Add rs6000/t-savresfgpr to tmake_file. * config.host (powerpc-*-elf*): Add rs6000/t-savresfgpr to tmake_file.

7
libgcc/config/i386/sol2-unwind.h
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@ -249,7 +249,12 @@ x86_fallback_frame_state (struct _Unwind_Context *context,
fs->regs.reg[8].how = REG_SAVED_OFFSET; fs->regs.reg[8].how = REG_SAVED_OFFSET;
fs->regs.reg[8].loc.offset = (long)&mctx->gregs[EIP] - new_cfa; fs->regs.reg[8].loc.offset = (long)&mctx->gregs[EIP] - new_cfa;
fs->retaddr_column = 8; fs->retaddr_column = 8;
fs->signal_frame = 1;
/* SIGFPE for IEEE-754 exceptions is delivered after the faulting insn
rather than before it, so don't set fs->signal_frame in that case.
We test whether the ES field of the Status Register is zero. */
if ((mctx->fpregs.fp_reg_set.fpchip_state.status & 0x80) == 0)
fs->signal_frame = 1;
return _URC_NO_REASON; return _URC_NO_REASON;
} }

7
libgcc/config/sparc/sol2-unwind.h
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@ -403,7 +403,12 @@ MD_FALLBACK_FRAME_STATE_FOR (struct _Unwind_Context *context,
fs->retaddr_column = 0; fs->retaddr_column = 0;
fs->regs.reg[0].how = REG_SAVED_OFFSET; fs->regs.reg[0].how = REG_SAVED_OFFSET;
fs->regs.reg[0].loc.offset = (long)shifted_ra_location - new_cfa; fs->regs.reg[0].loc.offset = (long)shifted_ra_location - new_cfa;
fs->signal_frame = 1;
/* SIGFPE for IEEE-754 exceptions is delivered after the faulting insn
rather than before it, so don't set fs->signal_frame in that case.
We test whether the cexc field of the FSR is zero. */
if ((mctx->fpregs.fpu_fsr & 0x1f) == 0)
fs->signal_frame = 1;
return _URC_NO_REASON; return _URC_NO_REASON;
} }