mirror of git://gcc.gnu.org/git/gcc.git
re PR target/47754 ([missed optimization] AVX allows unaligned memory operands but GCC uses unaligned load and register operand)
PR target/47754 * config/i386/i386.c (ix86_avx256_split_vector_move_misalign): If op1 is misaligned_operand, just use *mov<mode>_internal insn rather than UNSPEC_LOADU load. (ix86_expand_vector_move_misalign): Likewise (for TARGET_AVX only). Avoid gen_lowpart on op0 if it isn't MEM. * gcc.target/i386/avx256-unaligned-load-1.c: Adjust scan-assembler and scan-assembler-not regexps. * gcc.target/i386/avx256-unaligned-load-2.c: Likewise. * gcc.target/i386/avx256-unaligned-load-3.c: Likewise. * gcc.target/i386/avx256-unaligned-load-4.c: Likewise. * gcc.target/i386/l_fma_float_1.c: Use pattern for scan-assembler-times instead of just one insn name. * gcc.target/i386/l_fma_float_2.c: Likewise. * gcc.target/i386/l_fma_float_3.c: Likewise. * gcc.target/i386/l_fma_float_4.c: Likewise. * gcc.target/i386/l_fma_float_5.c: Likewise. * gcc.target/i386/l_fma_float_6.c: Likewise. * gcc.target/i386/l_fma_double_1.c: Likewise. * gcc.target/i386/l_fma_double_2.c: Likewise. * gcc.target/i386/l_fma_double_3.c: Likewise. * gcc.target/i386/l_fma_double_4.c: Likewise. * gcc.target/i386/l_fma_double_5.c: Likewise. * gcc.target/i386/l_fma_double_6.c: Likewise. From-SVN: r204219
This commit is contained in:
Jakub Jelinek
parent
3e4403a4c4
commit
1079f7a198
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@ -16560,6 +16560,12 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1)
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r = gen_rtx_VEC_CONCAT (GET_MODE (op0), r, m);
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emit_move_insn (op0, r);
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}
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/* Normal *mov<mode>_internal pattern will handle
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unaligned loads just fine if misaligned_operand
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is true, and without the UNSPEC it can be combined
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with arithmetic instructions. */
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else if (misaligned_operand (op1, GET_MODE (op1)))
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emit_insn (gen_rtx_SET (VOIDmode, op0, op1));
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else
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emit_insn (load_unaligned (op0, op1));
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}
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@ -16634,7 +16640,7 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1)
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void
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ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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{
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rtx op0, op1, m;
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rtx op0, op1, orig_op0 = NULL_RTX, m;
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rtx (*load_unaligned) (rtx, rtx);
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rtx (*store_unaligned) (rtx, rtx);
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@ -16647,7 +16653,16 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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{
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case MODE_VECTOR_INT:
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case MODE_INT:
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op0 = gen_lowpart (V16SImode, op0);
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if (GET_MODE (op0) != V16SImode)
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{
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if (!MEM_P (op0))
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{
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orig_op0 = op0;
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op0 = gen_reg_rtx (V16SImode);
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}
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else
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op0 = gen_lowpart (V16SImode, op0);
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}
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op1 = gen_lowpart (V16SImode, op1);
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/* FALLTHRU */
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@ -16676,6 +16691,8 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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emit_insn (store_unaligned (op0, op1));
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else
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gcc_unreachable ();
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if (orig_op0)
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emit_move_insn (orig_op0, gen_lowpart (GET_MODE (orig_op0), op0));
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break;
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default:
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@ -16692,12 +16709,23 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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{
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case MODE_VECTOR_INT:
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case MODE_INT:
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op0 = gen_lowpart (V32QImode, op0);
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if (GET_MODE (op0) != V32QImode)
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{
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if (!MEM_P (op0))
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{
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orig_op0 = op0;
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op0 = gen_reg_rtx (V32QImode);
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}
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else
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op0 = gen_lowpart (V32QImode, op0);
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}
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op1 = gen_lowpart (V32QImode, op1);
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/* FALLTHRU */
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case MODE_VECTOR_FLOAT:
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ix86_avx256_split_vector_move_misalign (op0, op1);
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if (orig_op0)
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emit_move_insn (orig_op0, gen_lowpart (GET_MODE (orig_op0), op0));
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break;
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default:
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@ -16709,15 +16737,30 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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if (MEM_P (op1))
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{
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/* Normal *mov<mode>_internal pattern will handle
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unaligned loads just fine if misaligned_operand
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is true, and without the UNSPEC it can be combined
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with arithmetic instructions. */
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if (TARGET_AVX
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&& (GET_MODE_CLASS (mode) == MODE_VECTOR_INT
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|| GET_MODE_CLASS (mode) == MODE_VECTOR_FLOAT)
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&& misaligned_operand (op1, GET_MODE (op1)))
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emit_insn (gen_rtx_SET (VOIDmode, op0, op1));
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/* ??? If we have typed data, then it would appear that using
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movdqu is the only way to get unaligned data loaded with
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integer type. */
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if (TARGET_SSE2 && GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
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else if (TARGET_SSE2 && GET_MODE_CLASS (mode) == MODE_VECTOR_INT)
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{
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op0 = gen_lowpart (V16QImode, op0);
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if (GET_MODE (op0) != V16QImode)
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{
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orig_op0 = op0;
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op0 = gen_reg_rtx (V16QImode);
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}
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op1 = gen_lowpart (V16QImode, op1);
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/* We will eventually emit movups based on insn attributes. */
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emit_insn (gen_sse2_loaddquv16qi (op0, op1));
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if (orig_op0)
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emit_move_insn (orig_op0, gen_lowpart (GET_MODE (orig_op0), op0));
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}
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else if (TARGET_SSE2 && mode == V2DFmode)
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{
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@ -16765,9 +16808,16 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[])
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|| TARGET_SSE_PACKED_SINGLE_INSN_OPTIMAL
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|| optimize_insn_for_size_p ())
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{
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op0 = gen_lowpart (V4SFmode, op0);
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if (GET_MODE (op0) != V4SFmode)
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{
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orig_op0 = op0;
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op0 = gen_reg_rtx (V4SFmode);
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}
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op1 = gen_lowpart (V4SFmode, op1);
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emit_insn (gen_sse_loadups (op0, op1));
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if (orig_op0)
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emit_move_insn (orig_op0,
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gen_lowpart (GET_MODE (orig_op0), op0));
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return;
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}
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@ -14,6 +14,6 @@ avx_test (void)
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c[i] = a[i] * b[i+3];
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}
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/* { dg-final { scan-assembler-not "avx_loadups256" } } */
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/* { dg-final { scan-assembler "sse_loadups" } } */
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/* { dg-final { scan-assembler-not "(avx_loadups256|vmovups\[^\n\r]*movv8sf_internal)" } } */
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/* { dg-final { scan-assembler "(sse_loadups|movv4sf_internal)" } } */
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/* { dg-final { scan-assembler "vinsertf128" } } */
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@ -10,6 +10,6 @@ avx_test (char **cp, char **ep)
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*ap++ = *cp++;
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}
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/* { dg-final { scan-assembler-not "avx_loaddqu256" } } */
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/* { dg-final { scan-assembler "sse2_loaddqu" } } */
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/* { dg-final { scan-assembler-not "(avx_loaddqu256|vmovdqu\[^\n\r]*movv32qi_internal)" } } */
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/* { dg-final { scan-assembler "(sse2_loaddqu|vmovdqu\[^\n\r]*movv16qi_internal)" } } */
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/* { dg-final { scan-assembler "vinsert.128" } } */
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@ -14,6 +14,6 @@ avx_test (void)
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c[i] = a[i] * b[i+3];
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}
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/* { dg-final { scan-assembler-not "avx_loadupd256" } } */
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/* { dg-final { scan-assembler "sse2_loadupd" } } */
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/* { dg-final { scan-assembler-not "(avx_loadupd256|vmovupd\[^\n\r]*movv4df_internal)" } } */
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/* { dg-final { scan-assembler "(sse2_loadupd|vmovupd\[^\n\r]*movv2df_internal)" } } */
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/* { dg-final { scan-assembler "vinsertf128" } } */
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@ -14,6 +14,6 @@ avx_test (void)
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b[i] = a[i+3] * 2;
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}
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/* { dg-final { scan-assembler "avx_loadups256" } } */
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/* { dg-final { scan-assembler-not "sse_loadups" } } */
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/* { dg-final { scan-assembler "(avx_loadups256|vmovups\[^\n\r]*movv8sf_internal)" } } */
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/* { dg-final { scan-assembler-not "(sse_loadups|vmovups\[^\n\r]*movv4sf_internal)" } } */
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/* { dg-final { scan-assembler-not "vinsertf128" } } */
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@ -9,15 +9,11 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
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#include "l_fma_1.h"
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/* { dg-final { scan-assembler-times "vfmadd132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmsub132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmsub231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmadd231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */
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@ -9,11 +9,11 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
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#include "l_fma_2.h"
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/* { dg-final { scan-assembler-times "vfmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */
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@ -9,14 +9,10 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
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#include "l_fma_3.h"
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/* { dg-final { scan-assembler-times "vfmadd132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmsub132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmsub231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmadd231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmsub231pd" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
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@ -9,10 +9,10 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
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#include "l_fma_4.h"
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/* { dg-final { scan-assembler-times "vfmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
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@ -9,11 +9,11 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
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#include "l_fma_5.h"
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/* { dg-final { scan-assembler-times "vfmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */
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@ -9,11 +9,11 @@ typedef double adouble __attribute__((aligned(sizeof (double))));
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#include "l_fma_6.h"
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/* { dg-final { scan-assembler-times "vfmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub132pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+pd" 8 } } */
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/* { dg-final { scan-assembler-times "vfmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfmsub\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmadd\[123\]+sd" 56 } } */
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/* { dg-final { scan-assembler-times "vfnmsub\[123\]+sd" 56 } } */
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@ -8,14 +8,10 @@
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#include "l_fma_1.h"
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/* { dg-final { scan-assembler-times "vfmadd132ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfmadd231ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfmsub132ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfmsub231ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmadd132ps" 4 } } */
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/* { dg-final { scan-assembler-times "vfnmadd231ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub132ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub231ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
|
|
|
|||
|
|
@ -8,11 +8,11 @@
|
|||
|
||||
#include "l_fma_2.h"
|
||||
|
||||
/* { dg-final { scan-assembler-times "vfmadd132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
|
|
|
|||
|
|
@ -8,15 +8,11 @@
|
|||
|
||||
#include "l_fma_3.h"
|
||||
|
||||
/* { dg-final { scan-assembler-times "vfmadd132ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd231ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub132ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub231ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd132ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd231ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub132ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub231ps" 4 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
|
|
|
|||
|
|
@ -8,11 +8,11 @@
|
|||
|
||||
#include "l_fma_4.h"
|
||||
|
||||
/* { dg-final { scan-assembler-times "vfmadd132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
|
|
|
|||
|
|
@ -8,11 +8,11 @@
|
|||
|
||||
#include "l_fma_5.h"
|
||||
|
||||
/* { dg-final { scan-assembler-times "vfmadd132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
|
|
|
|||
|
|
@ -8,11 +8,11 @@
|
|||
|
||||
#include "l_fma_6.h"
|
||||
|
||||
/* { dg-final { scan-assembler-times "vfmadd132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub132ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ps" 8 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfmsub\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmadd\[123\]+ss" 120 } } */
|
||||
/* { dg-final { scan-assembler-times "vfnmsub\[123\]+ss" 120 } } */
|
||||
|
|
|
|||
Loading…
Reference in New Issue