mirror of git://gcc.gnu.org/git/gcc.git
sse.md (movdi_to_sse): Use gen_lowpart and gen_higpart instead of gen_rtx_SUBREG.
* config/i386/sse.md (movdi_to_sse): Use gen_lowpart and gen_higpart instead of gen_rtx_SUBREG. * config/i386/i386.md (floatdi<X87MODEF:mode>2_i387_with_xmm splitter): Ditto. (read-modify peephole2): Use gen_lowpart instead of gen_rtx_SUBREG for operand 5. From-SVN: r225682
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@ -1,3 +1,12 @@
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2015-07-10 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/sse.md (movdi_to_sse): Use gen_lowpart
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and gen_higpart instead of gen_rtx_SUBREG.
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* config/i386/i386.md
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(floatdi<X87MODEF:mode>2_i387_with_xmm splitter): Ditto.
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(read-modify peephole2): Use gen_lowpart instead of
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gen_rtx_SUBREG for operand 5.
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2015-07-10 Andrew MacLeod <amacleod@redhat.com>
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2015-07-10 Andrew MacLeod <amacleod@redhat.com>
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* config/tilepro/gen-mul-tables.cc (main): Change include list for
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* config/tilepro/gen-mul-tables.cc (main): Change include list for
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@ -15,17 +24,17 @@
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2015-07-10 Jiong Wang <jiong.wang@arm.com>
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2015-07-10 Jiong Wang <jiong.wang@arm.com>
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* config/aarch64/aarch64.c (aarch64_load_symref_appropriately): Mark mem
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* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
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as READONLY and NOTRAP for PIC symbol.
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Mark mem as READONLY and NOTRAP for PIC symbol.
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2015-07-10 Andrew MacLeod <amacleod@redhat.com>
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2015-07-10 Andrew MacLeod <amacleod@redhat.com>
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* gimple-predict.h: New file.
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* gimple-predict.h: New file.
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(gimple_predict_predictor, gimple_predict_set_predictor,
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(gimple_predict_predictor, gimple_predict_set_predictor,
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gimple_predict_outcome, gimple_predict_set_outcome,
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gimple_predict_outcome, gimple_predict_set_outcome,
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gimple_build_predict): Relocate here.
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gimple_build_predict): Relocate here.
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* gimple.h (gimple_predict_predictor, gimple_predict_set_predictor,
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* gimple.h (gimple_predict_predictor, gimple_predict_set_predictor,
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gimple_predict_outcome, gimple_predict_set_outcome): Move to
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gimple_predict_outcome, gimple_predict_set_outcome): Move to
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gimple-predict.h.
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gimple-predict.h.
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* gimple.c (gimple_build_predict): Move to gimple-predict.h
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* gimple.c (gimple_build_predict): Move to gimple-predict.h
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* basic-block.h: Don't include cfghooks.h.
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* basic-block.h: Don't include cfghooks.h.
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@ -253,8 +262,7 @@
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2015-07-10 Richard Biener <rguenther@suse.de>
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2015-07-10 Richard Biener <rguenther@suse.de>
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* genmatch.c (dt_node::gen_kids_1): Fix indenting of
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* genmatch.c (dt_node::gen_kids_1): Fix indenting of case labels.
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case labels.
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(decision_tree::gen_gimple): Likewise.
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(decision_tree::gen_gimple): Likewise.
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(decision_tree::gen_generic): Likewise.
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(decision_tree::gen_generic): Likewise.
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@ -419,7 +427,7 @@
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* config/i386/predicates.md (nonimmediate_gr_operand): New predicate.
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* config/i386/predicates.md (nonimmediate_gr_operand): New predicate.
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* config/i386/i386.md (not peephole2): Use nonimmediate_gr_operand.
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* config/i386/i386.md (not peephole2): Use nonimmediate_gr_operand.
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(varous peephole2s): Use {GENERAL,SSE,MMX}_REGNO_P instead of
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(varous peephole2s): Use {GENERAL,SSE,MMX}_REGNO_P instead of
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{GENERAL_SSE_MMX}_REG_P where appropriate.
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{GENERAL,SSE,MMX}_REG_P where appropriate.
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2015-07-09 Andrew MacLeod <amacleod@redhat.com>
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2015-07-09 Andrew MacLeod <amacleod@redhat.com>
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@ -5100,11 +5100,11 @@
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/* The DImode arrived in a pair of integral registers (e.g. %edx:%eax).
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/* The DImode arrived in a pair of integral registers (e.g. %edx:%eax).
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Assemble the 64-bit DImode value in an xmm register. */
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Assemble the 64-bit DImode value in an xmm register. */
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emit_insn (gen_sse2_loadld (operands[3], CONST0_RTX (V4SImode),
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emit_insn (gen_sse2_loadld (operands[3], CONST0_RTX (V4SImode),
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gen_rtx_SUBREG (SImode, operands[1], 0)));
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gen_lowpart (SImode, operands[1])));
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emit_insn (gen_sse2_loadld (operands[4], CONST0_RTX (V4SImode),
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emit_insn (gen_sse2_loadld (operands[4], CONST0_RTX (V4SImode),
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gen_rtx_SUBREG (SImode, operands[1], 4)));
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gen_highpart (SImode, operands[1])));
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emit_insn (gen_vec_interleave_lowv4si (operands[3], operands[3],
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emit_insn (gen_vec_interleave_lowv4si (operands[3], operands[3],
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operands[4]));
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operands[4]));
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operands[3] = gen_rtx_REG (DImode, REGNO (operands[3]));
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operands[3] = gen_rtx_REG (DImode, REGNO (operands[3]));
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})
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})
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@ -18064,11 +18064,13 @@
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operands[1] = gen_rtx_PLUS (word_mode, base,
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operands[1] = gen_rtx_PLUS (word_mode, base,
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gen_rtx_MULT (word_mode, index, GEN_INT (scale)));
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gen_rtx_MULT (word_mode, index, GEN_INT (scale)));
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operands[5] = base;
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if (mode != word_mode)
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if (mode != word_mode)
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operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
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operands[1] = gen_rtx_SUBREG (mode, operands[1], 0);
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operands[5] = base;
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if (op1mode != word_mode)
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if (op1mode != word_mode)
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operands[5] = gen_rtx_SUBREG (op1mode, operands[5], 0);
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operands[5] = gen_lowpart (op1mode, operands[5]);
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operands[0] = dest;
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operands[0] = dest;
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})
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})
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@ -1080,9 +1080,9 @@
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/* The DImode arrived in a pair of integral registers (e.g. %edx:%eax).
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/* The DImode arrived in a pair of integral registers (e.g. %edx:%eax).
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Assemble the 64-bit DImode value in an xmm register. */
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Assemble the 64-bit DImode value in an xmm register. */
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emit_insn (gen_sse2_loadld (operands[0], CONST0_RTX (V4SImode),
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emit_insn (gen_sse2_loadld (operands[0], CONST0_RTX (V4SImode),
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gen_rtx_SUBREG (SImode, operands[1], 0)));
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gen_lowpart (SImode, operands[1])));
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emit_insn (gen_sse2_loadld (operands[2], CONST0_RTX (V4SImode),
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emit_insn (gen_sse2_loadld (operands[2], CONST0_RTX (V4SImode),
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gen_rtx_SUBREG (SImode, operands[1], 4)));
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gen_highpart (SImode, operands[1])));
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emit_insn (gen_vec_interleave_lowv4si (operands[0], operands[0],
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emit_insn (gen_vec_interleave_lowv4si (operands[0], operands[0],
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operands[2]));
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operands[2]));
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}
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}
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