invoke.texi: Consistently hyphenate "big-endian"/"little-endian" when used as adjectives.

2012-02-17  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* doc/invoke.texi: Consistently hyphenate "big-endian"/"little-endian"
	when used as adjectives.

From-SVN: r184364
This commit is contained in:
Sandra Loosemore 2012-02-17 19:53:45 -05:00 committed by Sandra Loosemore
parent 09bac6601a
commit 195a2e9d1f
2 changed files with 25 additions and 20 deletions

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@ -1,3 +1,8 @@
2012-02-17 Sandra Loosemore <sandra@codesourcery.com>
* doc/invoke.texi: Consistently hyphenate "big-endian"/"little-endian"
when used as adjectives.
2012-02-16 Sandra Loosemore <sandra@codesourcery.com>
* doc/invoke.texi: Clean up "that"/"which" confusion.

View File

@ -11486,11 +11486,11 @@ assembly code. Permissible names are: @samp{c62x},
@item -mbig-endian
@opindex mbig-endian
Generate code for a big endian target.
Generate code for a big-endian target.
@item -mlittle-endian
@opindex mlittle-endian
Generate code for a little endian target. This is the default.
Generate code for a little-endian target. This is the default.
@item -msim
@opindex msim
@ -13829,11 +13829,11 @@ These are the @samp{-m} options defined for the Intel IA-64 architecture.
@table @gcctabopt
@item -mbig-endian
@opindex mbig-endian
Generate code for a big endian target. This is the default for HP-UX@.
Generate code for a big-endian target. This is the default for HP-UX@.
@item -mlittle-endian
@opindex mlittle-endian
Generate code for a little endian target. This is the default for AIX5
Generate code for a little-endian target. This is the default for AIX5
and GNU/Linux.
@item -mgnu-as
@ -14745,7 +14745,7 @@ Prefer word access when reading byte quantities.
@itemx -mbig-endian
@opindex mlittle-endian
@opindex mbig-endian
Generate code for a little endian target.
Generate code for a little-endian target.
@item -m210
@itemx -m340
@ -16671,10 +16671,10 @@ Perform optimizations for the floating-point unit on Xilinx PPC 405/440.
Generate code that uses (does not use) the load multiple word
instructions and the store multiple word instructions. These
instructions are generated by default on POWER systems, and not
generated on PowerPC systems. Do not use @option{-mmultiple} on little
endian PowerPC systems, since those instructions do not work when the
processor is in little endian mode. The exceptions are PPC740 and
PPC750 which permit the instructions usage in little endian mode.
generated on PowerPC systems. Do not use @option{-mmultiple} on little-endian
PowerPC systems, since those instructions do not work when the
processor is in little-endian mode. The exceptions are PPC740 and
PPC750 which permit these instructions in little-endian mode.
@item -mstring
@itemx -mno-string
@ -16684,10 +16684,10 @@ Generate code that uses (does not use) the load string instructions
and the store string word instructions to save multiple registers and
do small block moves. These instructions are generated by default on
POWER systems, and not generated on PowerPC systems. Do not use
@option{-mstring} on little endian PowerPC systems, since those
instructions do not work when the processor is in little endian mode.
The exceptions are PPC740 and PPC750 which permit the instructions
usage in little endian mode.
@option{-mstring} on little-endian PowerPC systems, since those
instructions do not work when the processor is in little-endian mode.
The exceptions are PPC740 and PPC750 which permit these instructions
in little-endian mode.
@item -mupdate
@itemx -mno-update
@ -16797,7 +16797,7 @@ used in the program.
@opindex mlittle
@opindex mlittle-endian
On System V.4 and embedded PowerPC systems compile code for the
processor in little endian mode. The @option{-mlittle-endian} option is
processor in little-endian mode. The @option{-mlittle-endian} option is
the same as @option{-mlittle}.
@item -mbig
@ -16805,7 +16805,7 @@ the same as @option{-mlittle}.
@opindex mbig
@opindex mbig-endian
On System V.4 and embedded PowerPC systems compile code for the
processor in big endian mode. The @option{-mbig-endian} option is
processor in big-endian mode. The @option{-mbig-endian} option is
the same as @option{-mbig}.
@item -mdynamic-no-pic
@ -17270,7 +17270,7 @@ selected.
@opindex mbig-endian-data
@opindex mlittle-endian-data
Store data (but not code) in the big-endian format. The default is
@option{-mlittle-endian-data}, i.e.@: to store data in the little endian
@option{-mlittle-endian-data}, i.e.@: to store data in the little-endian
format.
@item -msmall-data-limit=@var{N}
@ -17600,11 +17600,11 @@ These options are defined for Score implementations:
@table @gcctabopt
@item -meb
@opindex meb
Compile code for big endian mode. This is the default.
Compile code for big-endian mode. This is the default.
@item -mel
@opindex mel
Compile code for little endian mode.
Compile code for little-endian mode.
@item -mnhwloop
@opindex mnhwloop
@ -17725,11 +17725,11 @@ instructions at the moment.
@item -mb
@opindex mb
Compile code for the processor in big endian mode.
Compile code for the processor in big-endian mode.
@item -ml
@opindex ml
Compile code for the processor in little endian mode.
Compile code for the processor in little-endian mode.
@item -mdalign
@opindex mdalign