arc.md, [...]: Replace gen_rtx with gen_rtx_fmt_e*.

* config/arc/arc.md, config/arm/arm.c, config/arm/arm.md,
	config/c4x/c4x.c, config/c4x/c4x.md, config/cris/cris.md,
	config/frv/frv.c, config/h8300/h8300.c, config/ip2k/ip2k.md,
	config/iq2000/iq2000.c, config/m32r/m32r.c,
	config/mcore/mcore.c, config/mips/mips.c, config/mmix/mmix.md,
	config/mn10300/mn10300.c, config/rs6000/rs6000.c,
	config/rs6000/rs6000.md, config/sh/sh.c, config/sh/sh.md,
	config/stormy16/stormy16.c, config/v850/v850.md,
	config/xtensa/xtensa.c: Replace gen_rtx with gen_rtx_fmt_e*.

From-SVN: r77098
This commit is contained in:
Kazu Hirata 2004-02-02 06:31:08 +00:00 committed by Kazu Hirata
parent 67245ad3f1
commit 1c563bedd2
23 changed files with 106 additions and 89 deletions

View File

@ -1,3 +1,15 @@
2004-02-02 Kazu Hirata <kazu@cs.umass.edu>
* config/arc/arc.md, config/arm/arm.c, config/arm/arm.md,
config/c4x/c4x.c, config/c4x/c4x.md, config/cris/cris.md,
config/frv/frv.c, config/h8300/h8300.c, config/ip2k/ip2k.md,
config/iq2000/iq2000.c, config/m32r/m32r.c,
config/mcore/mcore.c, config/mips/mips.c, config/mmix/mmix.md,
config/mn10300/mn10300.c, config/rs6000/rs6000.c,
config/rs6000/rs6000.md, config/sh/sh.c, config/sh/sh.md,
config/stormy16/stormy16.c, config/v850/v850.md,
config/xtensa/xtensa.c: Replace gen_rtx with gen_rtx_fmt_e*.
2004-02-01 Kazu Hirata <kazu@cs.umass.edu>
* config/mcore/mcore.c (block_move_sequence): Replace

View File

@ -1,5 +1,6 @@
;; Machine description of the Argonaut ARC cpu for GNU C compiler
;; Copyright (C) 1994, 1997, 1998, 1999, 2000 Free Software Foundation, Inc.
;; Copyright (C) 1994, 1997, 1998, 1999, 2000, 2004
;; Free Software Foundation, Inc.
;; This file is part of GCC.
@ -582,7 +583,7 @@
= gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
61);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
}")
;(define_expand "movdicc"
@ -598,7 +599,7 @@
; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
; 61);
;
; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
; operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
;}")
(define_expand "movsfcc"
@ -614,7 +615,7 @@
= gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
61);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
}")
;(define_expand "movdfcc"
@ -630,7 +631,7 @@
; = gen_rtx_REG (SELECT_CC_MODE (code, arc_compare_op0, arc_compare_op1),
; 61);
;
; operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
; operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
;}")
(define_insn "*movsicc_insn"

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@ -1243,7 +1243,7 @@ arm_split_constant (enum rtx_code code, enum machine_mode mode,
gen_rtx_MINUS (mode, temp, source)));
else
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx (code, mode, source, temp)));
gen_rtx_fmt_ee (code, mode, source, temp)));
return 2;
}
}
@ -1406,7 +1406,7 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode,
{
if (generate)
emit_insn (gen_rtx_SET (VOIDmode, target,
(source ? gen_rtx (code, mode, source,
(source ? gen_rtx_fmt_ee (code, mode, source,
GEN_INT (val))
: GEN_INT (val))));
return 1;
@ -1561,7 +1561,7 @@ arm_gen_constant (enum rtx_code code, enum machine_mode mode,
emit_insn (gen_rtx_SET (VOIDmode, sub, GEN_INT (val)));
emit_insn (gen_rtx_SET (VOIDmode, target,
gen_rtx (code, mode, source, sub)));
gen_rtx_fmt_ee (code, mode, source, sub)));
}
return 2;
}

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@ -2491,7 +2491,7 @@
(clobber (reg:CC CC_REGNUM))]
"TARGET_ARM"
"*
operands[3] = gen_rtx (minmax_code (operands[3]), SImode, operands[1],
operands[3] = gen_rtx_fmt_ee (minmax_code (operands[3]), SImode, operands[1],
operands[2]);
output_asm_insn (\"cmp\\t%1, %2\", operands);
output_asm_insn (\"str%d3\\t%1, %0\", operands);
@ -2521,7 +2521,7 @@
{
enum rtx_code code = GET_CODE (operands[4]);
operands[5] = gen_rtx (minmax_code (operands[5]), SImode, operands[2],
operands[5] = gen_rtx_fmt_ee (minmax_code (operands[5]), SImode, operands[2],
operands[3]);
output_asm_insn (\"cmp\\t%2, %3\", operands);
output_asm_insn (\"%i4%d5\\t%0, %1, %2\", operands);
@ -7003,7 +7003,7 @@
FAIL;
ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
}"
)
@ -7028,7 +7028,7 @@
operands[3] = force_reg (SFmode, operands[3]);
ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
}"
)
@ -7047,7 +7047,7 @@
FAIL;
ccreg = arm_gen_compare_reg (code, arm_compare_op0, arm_compare_op1);
operands[1] = gen_rtx (code, VOIDmode, ccreg, const0_rtx);
operands[1] = gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx);
}"
)

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@ -1390,13 +1390,13 @@ c4x_emit_libcall (rtx libcall, enum rtx_code code,
case 2:
ret = emit_library_call_value (libcall, NULL_RTX, 1, dmode, 1,
operands[1], smode);
equiv = gen_rtx (code, dmode, operands[1]);
equiv = gen_rtx_fmt_e (code, dmode, operands[1]);
break;
case 3:
ret = emit_library_call_value (libcall, NULL_RTX, 1, dmode, 2,
operands[1], smode, operands[2], smode);
equiv = gen_rtx (code, dmode, operands[1], operands[2]);
equiv = gen_rtx_fmt_ee (code, dmode, operands[1], operands[2]);
break;
default:
@ -1431,8 +1431,8 @@ c4x_emit_libcall_mulhi (rtx libcall, enum rtx_code code,
equiv = gen_rtx_TRUNCATE (mode,
gen_rtx_LSHIFTRT (HImode,
gen_rtx_MULT (HImode,
gen_rtx (code, HImode, operands[1]),
gen_rtx (code, HImode, operands[2])),
gen_rtx_fmt_e (code, HImode, operands[1]),
gen_rtx_fmt_e (code, HImode, operands[2])),
GEN_INT (32)));
insns = get_insns ();
end_sequence ();

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@ -4247,7 +4247,7 @@
if (ccreg == NULL_RTX) FAIL;
emit_insn (gen_rtx_SET (QImode, operands[0],
gen_rtx_IF_THEN_ELSE (QImode,
gen_rtx (code, VOIDmode, ccreg, const0_rtx),
gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx),
operands[2], operands[3])));
DONE;}")
@ -4291,7 +4291,7 @@
if (ccreg == NULL_RTX) FAIL;
emit_insn (gen_rtx_SET (QFmode, operands[0],
gen_rtx_IF_THEN_ELSE (QFmode,
gen_rtx (code, VOIDmode, ccreg, const0_rtx),
gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx),
operands[2], operands[3])));
DONE;}")
@ -4334,7 +4334,7 @@
if (ccreg == NULL_RTX) FAIL;
emit_insn (gen_rtx_SET (HFmode, operands[0],
gen_rtx_IF_THEN_ELSE (HFmode,
gen_rtx (code, VOIDmode, ccreg, const0_rtx),
gen_rtx_fmt_ee (code, VOIDmode, ccreg, const0_rtx),
operands[2], operands[3])));
DONE;}")

View File

@ -1,5 +1,6 @@
;; GCC machine description for CRIS cpu cores.
;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
;; Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004
;; Free Software Foundation, Inc.
;; Contributed by Axis Communications.
;; This file is part of GCC.
@ -4544,7 +4545,7 @@
[(set (match_dup 5) (plus:SI (mult:SI (match_dup 2) (match_dup 3))
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 1) (match_dup 8)]))]
"operands[8] = gen_rtx (GET_CODE (operands[7]), GET_MODE (operands[7]),
"operands[8] = gen_rtx_fmt_e (GET_CODE (operands[7]), GET_MODE (operands[7]),
replace_equiv_address (XEXP (operands[7], 0),
operands[5]));")
@ -4569,7 +4570,7 @@
|| rtx_equal_p (operands[4], operands[3]))"
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 5 [(match_dup 1) (match_dup 7)]))]
"operands[7] = gen_rtx (GET_CODE (operands[6]), GET_MODE (operands[6]),
"operands[7] = gen_rtx_fmt_e (GET_CODE (operands[6]), GET_MODE (operands[6]),
replace_equiv_address (XEXP (operands[6], 0),
operands[4]));")
@ -4596,7 +4597,7 @@
[(set (match_dup 5) (plus:SI (mult:SI (match_dup 2) (match_dup 3))
(match_dup 4)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 8) (match_dup 1)]))]
"operands[8] = gen_rtx (GET_CODE (operands[6]), GET_MODE (operands[6]),
"operands[8] = gen_rtx_fmt_e (GET_CODE (operands[6]), GET_MODE (operands[6]),
replace_equiv_address (XEXP (operands[6], 0),
operands[5]));")
@ -4620,7 +4621,7 @@
|| rtx_equal_p (operands[4], operands[3]))"
[(set (match_dup 4) (plus:SI (match_dup 2) (match_dup 3)))
(set (match_dup 0) (match_op_dup 6 [(match_dup 7) (match_dup 1)]))]
"operands[7] = gen_rtx (GET_CODE (operands[5]), GET_MODE (operands[5]),
"operands[7] = gen_rtx_fmt_e (GET_CODE (operands[5]), GET_MODE (operands[5]),
replace_equiv_address (XEXP (operands[5], 0),
operands[4]));")

View File

@ -5742,7 +5742,7 @@ frv_emit_cond_branch (enum rtx_code test, rtx label)
(label_ref <branch_label>)
(pc))) */
label_ref = gen_rtx_LABEL_REF (VOIDmode, label);
test_rtx = gen_rtx (test, cc_mode, cc_reg, const0_rtx);
test_rtx = gen_rtx_fmt_ee (test, cc_mode, cc_reg, const0_rtx);
if_else = gen_rtx_IF_THEN_ELSE (cc_mode, test_rtx, label_ref, pc_rtx);
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx, if_else));
return TRUE;

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@ -2733,7 +2733,7 @@ expand_a_shift (enum machine_mode mode, int code, rtx operands[])
(VOIDmode,
gen_rtvec (2,
gen_rtx_SET (VOIDmode, operands[0],
gen_rtx (code, mode, operands[0],
gen_rtx_fmt_ee (code, mode, operands[0],
operands[2])),
gen_rtx_CLOBBER (VOIDmode,
gen_rtx_SCRATCH (QImode)))));
@ -3876,7 +3876,7 @@ expand_a_rotate (enum rtx_code code, rtx operands[])
emit_label (start_label);
/* Rotate by one bit. */
tmp = gen_rtx (code, mode, dst, GEN_INT (1));
tmp = gen_rtx_fmt_ee (code, mode, dst, GEN_INT (1));
emit_insn (gen_rtx_SET (mode, dst, tmp));
/* Decrement the counter by 1. */
@ -3893,7 +3893,7 @@ expand_a_rotate (enum rtx_code code, rtx operands[])
else
{
/* Rotate by AMOUNT bits. */
tmp = gen_rtx (code, mode, dst, rotate_amount);
tmp = gen_rtx_fmt_ee (code, mode, dst, rotate_amount);
emit_insn (gen_rtx_SET (mode, dst, tmp));
}
@ -4101,7 +4101,7 @@ fix_bit_operand (rtx *operands, int what, enum rtx_code type)
{
rtx res = gen_reg_rtx (QImode);
emit_insn (gen_rtx_SET (VOIDmode, res,
gen_rtx (type, QImode, operands[1], operands[2])));
gen_rtx_fmt_ee (type, QImode, operands[1], operands[2])));
emit_insn (gen_rtx_SET (VOIDmode, operands[0], res));
}
return 1;

View File

@ -1,6 +1,7 @@
;; -*- Mode: Scheme -*-
;; GCC machine description for Ubicom IP2022 Communications Controller.
;; Copyright (C) 2000, 2001, 2002 Free Software Foundation, Inc.
;; Copyright (C) 2000, 2001, 2002, 2004
;; Free Software Foundation, Inc.
;; Contributed by Red Hat, Inc and Ubicom, Inc.
;;
;; This file is part of GCC.
@ -4846,7 +4847,7 @@
(label_ref (match_operand 0 "" ""))
(pc)))]
"{
operands[2] = gen_rtx (reverse_condition (GET_CODE (operands[1])),
operands[2] = gen_rtx_fmt_ee (reverse_condition (GET_CODE (operands[1])),
GET_MODE (operands[1]),
cc0_rtx, const0_rtx);
}")

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@ -1171,7 +1171,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1,
else
{
reg = (invert || eqne_p) ? gen_reg_rtx (mode) : result;
convert_move (reg, gen_rtx (p_info->test_code, mode, cmp0, cmp1), 0);
convert_move (reg, gen_rtx_fmt_ee (p_info->test_code, mode, cmp0, cmp1), 0);
}
if (test == ITEST_NE)
@ -1242,7 +1242,7 @@ gen_conditional_branch (rtx operands[], enum rtx_code test_code)
/* For cmp0 != cmp1, build cmp0 == cmp1, and test for result == 0. */
emit_insn (gen_rtx_SET (VOIDmode, reg,
gen_rtx (test_code == NE ? EQ : test_code,
gen_rtx_fmt_ee (test_code == NE ? EQ : test_code,
CCmode, cmp0, cmp1)));
test_code = test_code == NE ? EQ : NE;
@ -1253,7 +1253,7 @@ gen_conditional_branch (rtx operands[], enum rtx_code test_code)
break;
default:
abort_with_insn (gen_rtx (test_code, VOIDmode, cmp0, cmp1), "bad test");
abort_with_insn (gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1), "bad test");
}
/* Generate the branch. */
@ -1268,7 +1268,7 @@ gen_conditional_branch (rtx operands[], enum rtx_code test_code)
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_IF_THEN_ELSE (VOIDmode,
gen_rtx (test_code, mode,
gen_rtx_fmt_ee (test_code, mode,
cmp0, cmp1),
label1, label2)));
}

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@ -1062,7 +1062,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
{
emit_insn (gen_cmp_eqsi_insn (x, y));
return gen_rtx (code, CCmode, cc_reg, const0_rtx);
return gen_rtx_fmt_ee (code, CCmode, cc_reg, const0_rtx);
}
break;
@ -1102,7 +1102,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
abort ();
}
return gen_rtx (code, CCmode, cc_reg, const0_rtx);
return gen_rtx_fmt_ee (code, CCmode, cc_reg, const0_rtx);
}
break;
@ -1142,7 +1142,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
abort();
}
return gen_rtx (code, CCmode, cc_reg, const0_rtx);
return gen_rtx_fmt_ee (code, CCmode, cc_reg, const0_rtx);
}
break;
@ -1155,12 +1155,12 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
/* Reg/reg equal comparison. */
if (compare_code == EQ
&& register_operand (y, SImode))
return gen_rtx (code, CCmode, x, y);
return gen_rtx_fmt_ee (code, CCmode, x, y);
/* Reg/zero signed comparison. */
if ((compare_code == EQ || compare_code == LT)
&& y == const0_rtx)
return gen_rtx (code, CCmode, x, y);
return gen_rtx_fmt_ee (code, CCmode, x, y);
/* Reg/smallconst equal comparison. */
if (compare_code == EQ
@ -1170,7 +1170,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
rtx tmp = gen_reg_rtx (SImode);
emit_insn (gen_addsi3 (tmp, x, GEN_INT (-INTVAL (y))));
return gen_rtx (code, CCmode, tmp, const0_rtx);
return gen_rtx_fmt_ee (code, CCmode, tmp, const0_rtx);
}
/* Reg/const equal comparison. */
@ -1179,7 +1179,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
{
rtx tmp = force_reg (GET_MODE (x), y);
return gen_rtx (code, CCmode, x, tmp);
return gen_rtx_fmt_ee (code, CCmode, x, tmp);
}
}
@ -1215,7 +1215,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare)
abort ();
}
return gen_rtx (branch_code, VOIDmode, cc_reg, CONST0_RTX (CCmode));
return gen_rtx_fmt_ee (branch_code, VOIDmode, cc_reg, CONST0_RTX (CCmode));
}
/* Split a 2 word move (DI or DF) into component parts. */

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@ -623,7 +623,7 @@ mcore_gen_compare_reg (enum rtx_code code)
break;
}
emit_insn (gen_rtx_SET (VOIDmode, cc_reg, gen_rtx (code, CCmode, op0, op1)));
emit_insn (gen_rtx_SET (VOIDmode, cc_reg, gen_rtx_fmt_ee (code, CCmode, op0, op1)));
return cc_reg;
}

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@ -3001,7 +3001,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0,
else
{
reg = (invert || eqne_p) ? gen_reg_rtx (mode) : result;
convert_move (reg, gen_rtx (p_info->test_code, mode, cmp0, cmp1), 0);
convert_move (reg, gen_rtx_fmt_ee (p_info->test_code, mode, cmp0, cmp1), 0);
}
if (test == ITEST_NE)
@ -3124,7 +3124,7 @@ gen_conditional_branch (rtx *operands, enum rtx_code test_code)
get_float_compare_codes (test_code, &cmp_code, &test_code);
emit_insn (gen_rtx_SET (VOIDmode, reg,
gen_rtx (cmp_code, CCmode, cmp0, cmp1)));
gen_rtx_fmt_ee (cmp_code, CCmode, cmp0, cmp1)));
mode = CCmode;
cmp0 = reg;
@ -3133,7 +3133,7 @@ gen_conditional_branch (rtx *operands, enum rtx_code test_code)
break;
default:
fatal_insn ("bad test", gen_rtx (test_code, VOIDmode, cmp0, cmp1));
fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1));
}
/* Generate the branch. */
@ -3149,7 +3149,7 @@ gen_conditional_branch (rtx *operands, enum rtx_code test_code)
emit_jump_insn (gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_IF_THEN_ELSE (VOIDmode,
gen_rtx (test_code, mode,
gen_rtx_fmt_ee (test_code, mode,
cmp0, cmp1),
label1, label2)));
}
@ -3230,11 +3230,11 @@ gen_conditional_move (rtx *operands)
cmp_reg = gen_reg_rtx (cmp_mode);
emit_insn (gen_rtx_SET (cmp_mode, cmp_reg,
gen_rtx (cmp_code, cmp_mode, op0, op1)));
gen_rtx_fmt_ee (cmp_code, cmp_mode, op0, op1)));
emit_insn (gen_rtx_SET (op_mode, operands[0],
gen_rtx_IF_THEN_ELSE (op_mode,
gen_rtx (move_code, VOIDmode,
gen_rtx_fmt_ee (move_code, VOIDmode,
cmp_reg,
CONST0_RTX (SImode)),
operands[2], operands[3])));
@ -3275,7 +3275,7 @@ mips_gen_conditional_trap (rtx *operands)
op1 = force_reg (mode, op1);
emit_insn (gen_rtx_TRAP_IF (VOIDmode,
gen_rtx (cmp_code, GET_MODE (operands[0]), op0, op1),
gen_rtx_fmt_ee (cmp_code, GET_MODE (operands[0]), op0, op1),
operands[1]));
}

View File

@ -1,5 +1,6 @@
;; GCC machine description for MMIX
;; Copyright (C) 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
;; Copyright (C) 2000, 2001, 2002, 2003, 2004
;; Free Software Foundation, Inc.
;; Contributed by Hans-Peter Nilsson (hp@bitrange.com)
;; This file is part of GCC.
@ -732,7 +733,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2")
mmix_compare_op1);
if (cc_reg == NULL_RTX)
FAIL;
operands[1] = gen_rtx (code, VOIDmode, cc_reg, const0_rtx);
operands[1] = gen_rtx_fmt_ee (code, VOIDmode, cc_reg, const0_rtx);
}")
(define_expand "movdicc"
@ -749,7 +750,7 @@ DIVU %1,%1,%2\;GET %0,:rR\;NEGU %2,0,%0\;CSNN %0,$255,%2")
mmix_compare_op1);
if (cc_reg == NULL_RTX)
FAIL;
operands[1] = gen_rtx (code, VOIDmode, cc_reg, const0_rtx);
operands[1] = gen_rtx_fmt_ee (code, VOIDmode, cc_reg, const0_rtx);
}")
;; FIXME: Is this the right way to do "folding" of CCmode -> DImode?

View File

@ -1800,7 +1800,7 @@ legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED,
regy1 = force_reg (Pmode, force_operand (XEXP (y, 0), 0));
regy2 = force_reg (Pmode, force_operand (XEXP (y, 1), 0));
regx1 = force_reg (Pmode,
gen_rtx (GET_CODE (y), Pmode, regx1, regy2));
gen_rtx_fmt_ee (GET_CODE (y), Pmode, regx1, regy2));
return force_reg (Pmode, gen_rtx_PLUS (Pmode, regx1, regy1));
}
}

View File

@ -9664,8 +9664,8 @@ rs6000_generate_compare (enum rtx_code code)
}
validate_condition_mode (or1, comp_mode);
validate_condition_mode (or2, comp_mode);
or1_rtx = gen_rtx (or1, SImode, compare_result, const0_rtx);
or2_rtx = gen_rtx (or2, SImode, compare_result, const0_rtx);
or1_rtx = gen_rtx_fmt_ee (or1, SImode, compare_result, const0_rtx);
or2_rtx = gen_rtx_fmt_ee (or2, SImode, compare_result, const0_rtx);
compare2_rtx = gen_rtx_COMPARE (CCEQmode,
gen_rtx_IOR (SImode, or1_rtx, or2_rtx),
const_true_rtx);
@ -9677,7 +9677,7 @@ rs6000_generate_compare (enum rtx_code code)
validate_condition_mode (code, GET_MODE (compare_result));
return gen_rtx (code, VOIDmode, compare_result, const0_rtx);
return gen_rtx_fmt_ee (code, VOIDmode, compare_result, const0_rtx);
}
@ -9704,7 +9704,7 @@ rs6000_emit_sCOND (enum rtx_code code, rtx result)
cc_mode = GET_MODE (XEXP (condition_rtx, 0));
rev_cond_rtx = gen_rtx (rs6000_reverse_condition (cc_mode, cond_code),
rev_cond_rtx = gen_rtx_fmt_ee (rs6000_reverse_condition (cc_mode, cond_code),
SImode, XEXP (condition_rtx, 0), const0_rtx);
not_op = gen_rtx_COMPARE (CCEQmode, rev_cond_rtx, const0_rtx);
emit_insn (gen_rtx_SET (VOIDmode, not_result, not_op));

View File

@ -2583,10 +2583,10 @@
{
rtx i;
i = GEN_INT (INTVAL (operands[2]) & (~ (HOST_WIDE_INT) 0xffff));
operands[4] = gen_rtx (GET_CODE (operands[3]), SImode,
operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[3]), SImode,
operands[1], i);
i = GEN_INT (INTVAL (operands[2]) & 0xffff);
operands[5] = gen_rtx (GET_CODE (operands[3]), SImode,
operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), SImode,
operands[0], i);
}")
@ -7363,9 +7363,9 @@
& (~ (HOST_WIDE_INT) 0xffff));
i4 = GEN_INT (INTVAL (operands[2]) & 0xffff);
}
operands[4] = gen_rtx (GET_CODE (operands[3]), DImode,
operands[4] = gen_rtx_fmt_ee (GET_CODE (operands[3]), DImode,
operands[1], i3);
operands[5] = gen_rtx (GET_CODE (operands[3]), DImode,
operands[5] = gen_rtx_fmt_ee (GET_CODE (operands[3]), DImode,
operands[0], i4);
}")
@ -13685,22 +13685,22 @@
positive_2 = branch_positive_comparison_operator (operands[3], CCEQmode);
if (! positive_1)
operands[1] = gen_rtx (rs6000_reverse_condition (GET_MODE (operands[2]),
operands[1] = gen_rtx_fmt_ee (rs6000_reverse_condition (GET_MODE (operands[2]),
GET_CODE (operands[1])),
SImode,
operands[2], const0_rtx);
else if (GET_MODE (operands[1]) != SImode)
operands[1] = gen_rtx (GET_CODE (operands[1]),
operands[1] = gen_rtx_fmt_ee (GET_CODE (operands[1]),
SImode,
operands[2], const0_rtx);
if (! positive_2)
operands[3] = gen_rtx (rs6000_reverse_condition (GET_MODE (operands[4]),
operands[3] = gen_rtx_fmt_ee (rs6000_reverse_condition (GET_MODE (operands[4]),
GET_CODE (operands[3])),
SImode,
operands[4], const0_rtx);
else if (GET_MODE (operands[3]) != SImode)
operands[3] = gen_rtx (GET_CODE (operands[3]),
operands[3] = gen_rtx_fmt_ee (GET_CODE (operands[3]),
SImode,
operands[4], const0_rtx);
@ -14207,7 +14207,7 @@
(match_dup 5)
(match_dup 6)))]
"
{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
{ operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); }")
(define_split
@ -14236,7 +14236,7 @@
(match_dup 5)
(match_dup 6)))]
"
{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
{ operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); }")
(define_split
[(set (pc)
@ -14262,7 +14262,7 @@
(match_dup 5)
(match_dup 6)))]
"
{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
{ operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); }")
(define_split
@ -14291,7 +14291,7 @@
(match_dup 5)
(match_dup 6)))]
"
{ operands[7] = gen_rtx (GET_CODE (operands[2]), VOIDmode, operands[3],
{ operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[2]), VOIDmode, operands[3],
const0_rtx); }")
(define_insn "trap"

View File

@ -958,12 +958,12 @@ prepare_scc_operands (enum rtx_code code)
(mode == SFmode ? emit_sf_insn : emit_df_insn)
(gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2,
gen_rtx_SET (VOIDmode, t_reg,
gen_rtx (code, SImode,
gen_rtx_fmt_ee (code, SImode,
sh_compare_op0, sh_compare_op1)),
gen_rtx_USE (VOIDmode, get_fpscr_rtx ()))));
else
emit_insn (gen_rtx_SET (VOIDmode, t_reg,
gen_rtx (code, SImode, sh_compare_op0,
gen_rtx_fmt_ee (code, SImode, sh_compare_op0,
sh_compare_op1)));
return t_reg;
@ -997,7 +997,7 @@ from_compare (rtx *operands, int code)
else
insn = gen_rtx_SET (VOIDmode,
gen_rtx_REG (SImode, T_REG),
gen_rtx (code, SImode, sh_compare_op0,
gen_rtx_fmt_ee (code, SImode, sh_compare_op0,
sh_compare_op1));
if (TARGET_SH4 && GET_MODE_CLASS (mode) == MODE_FLOAT)
{

View File

@ -898,7 +898,7 @@
if ((GET_CODE (operands[1]) == EQ || GET_CODE (operands[1]) == NE)
&& GET_MODE (sh_compare_op0) == DImode
&& sh_compare_op1 == const0_rtx)
operands[1] = gen_rtx (GET_CODE (operands[1]), VOIDmode,
operands[1] = gen_rtx_fmt_ee (GET_CODE (operands[1]), VOIDmode,
sh_compare_op0, sh_compare_op1);
else
{
@ -8261,7 +8261,7 @@ mov.l\\t1f,r0\\n\\
operands[7] = gen_rtx_REG (SFmode,
(true_regnum (operands[0])
+ (INTVAL (operands[3]) ^ endian)));
operands[6] = gen_rtx (GET_CODE (operands[2]), SFmode, op1);
operands[6] = gen_rtx_fmt_e (GET_CODE (operands[2]), SFmode, op1);
}"
[(set_attr "type" "fparith_media")])
@ -8297,7 +8297,7 @@ mov.l\\t1f,r0\\n\\
operands[8] = gen_rtx_REG (SFmode,
(true_regnum (operands[0])
+ (INTVAL (operands[4]) ^ endian)));
operands[9] = gen_rtx (GET_CODE (operands[3]), SFmode, op1, op2);
operands[9] = gen_rtx_fmt_ee (GET_CODE (operands[3]), SFmode, op1, op2);
}"
[(set_attr "type" "fparith_media")])

View File

@ -233,7 +233,7 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx loc)
op0 = tmp;
}
condition_rtx = gen_rtx (code, mode, op0, op1);
condition_rtx = gen_rtx_fmt_ee (code, mode, op0, op1);
loc_ref = gen_rtx_LABEL_REF (VOIDmode, loc);
branch = gen_rtx_SET (VOIDmode, pc_rtx,
gen_rtx_IF_THEN_ELSE (VOIDmode, condition_rtx,
@ -1855,7 +1855,7 @@ xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code,
&& INTVAL (w_src1) == -(code == AND))
continue;
insn = gen_rtx_SET (VOIDmode, w_dest, gen_rtx (code, mode,
insn = gen_rtx_SET (VOIDmode, w_dest, gen_rtx_fmt_ee (code, mode,
w_src0, w_src1));
break;

View File

@ -1,5 +1,6 @@
;; GCC machine description for NEC V850
;; Copyright (C) 1996, 1997, 1998, 1999, 2002 Free Software Foundation, Inc.
;; Copyright (C) 1996, 1997, 1998, 1999, 2002, 2004
;; Free Software Foundation, Inc.
;; Contributed by Jeff Law (law@cygnus.com).
;; This file is part of GCC.
@ -1032,7 +1033,7 @@
if (INTVAL (operands[2]) & 0x1)
operands[7] = operands[1];
else
operands[7] = gen_rtx (reverse_condition (GET_CODE (operands[1])),
operands[7] = gen_rtx_fmt_ee (reverse_condition (GET_CODE (operands[1])),
GET_MODE (operands[1]), XEXP (operands[1], 0),
XEXP (operands[1], 1));
}")

View File

@ -981,7 +981,7 @@ gen_int_relational (enum rtx_code test_code, /* relational test (EQ, etc) */
cmp1 = temp;
}
return gen_rtx (p_info->test_code, VOIDmode, cmp0, cmp1);
return gen_rtx_fmt_ee (p_info->test_code, VOIDmode, cmp0, cmp1);
}
@ -1006,7 +1006,7 @@ gen_float_relational (enum rtx_code test_code, /* relational test (EQ, etc) */
case LT: reverse_regs = 0; invert = 0; gen_fn = gen_slt_sf; break;
case GE: reverse_regs = 1; invert = 0; gen_fn = gen_sle_sf; break;
default:
fatal_insn ("bad test", gen_rtx (test_code, VOIDmode, cmp0, cmp1));
fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1));
reverse_regs = 0; invert = 0; gen_fn = 0; /* avoid compiler warnings */
}
@ -1020,7 +1020,7 @@ gen_float_relational (enum rtx_code test_code, /* relational test (EQ, etc) */
brtmp = gen_rtx_REG (CCmode, FPCC_REGNUM);
emit_insn (gen_fn (brtmp, cmp0, cmp1));
return gen_rtx (invert ? EQ : NE, VOIDmode, brtmp, const0_rtx);
return gen_rtx_fmt_ee (invert ? EQ : NE, VOIDmode, brtmp, const0_rtx);
}
@ -1038,7 +1038,7 @@ xtensa_expand_conditional_branch (rtx *operands, enum rtx_code test_code)
{
case CMP_DF:
default:
fatal_insn ("bad test", gen_rtx (test_code, VOIDmode, cmp0, cmp1));
fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1));
case CMP_SI:
invert = FALSE;
@ -1047,7 +1047,7 @@ xtensa_expand_conditional_branch (rtx *operands, enum rtx_code test_code)
case CMP_SF:
if (!TARGET_HARD_FLOAT)
fatal_insn ("bad test", gen_rtx (test_code, VOIDmode, cmp0, cmp1));
fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1));
invert = FALSE;
cmp = gen_float_relational (test_code, cmp0, cmp1);
break;
@ -1093,7 +1093,7 @@ gen_conditional_move (rtx cmp)
code = GE;
op1 = const0_rtx;
}
cmp = gen_rtx (code, VOIDmode, cc0_rtx, const0_rtx);
cmp = gen_rtx_fmt_ee (code, VOIDmode, cc0_rtx, const0_rtx);
if (boolean_operator (cmp, VOIDmode))
{
@ -1134,7 +1134,7 @@ gen_conditional_move (rtx cmp)
else
return 0;
return gen_rtx (code, VOIDmode, op0, op1);
return gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
}
if (TARGET_HARD_FLOAT && (branch_type == CMP_SF))