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* arm.md (addsi3_carryin_shift): Add missing register constraints. 

From-SVN: r74694
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Richard Earnshaw 2003-12-16 13:56:25 +00:00 committed by Richard Earnshaw
parent 649a1a476c
commit 1cc82d1389
2 changed files with 8 additions and 4 deletions
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4
gcc/ChangeLog
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@ -1,3 +1,7 @@
2003-12-16 Richard Earnshaw <rearnsha@arm.com>
* arm.md (addsi3_carryin_shift): Add missing register constraints.
2003-12-16 Loren James Rittle <ljrittle@acm.org> 2003-12-16 Loren James Rittle <ljrittle@acm.org>
* testsuite/g++.old-deja/g++.eh/badalloc1.C: Tweak to * testsuite/g++.old-deja/g++.eh/badalloc1.C: Tweak to

8
gcc/config/arm/arm.md
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@ -792,13 +792,13 @@
) )
(define_insn "*addsi3_carryin_shift" (define_insn "*addsi3_carryin_shift"
[(set (match_operand:SI 0 "s_register_operand" "") [(set (match_operand:SI 0 "s_register_operand" "=r")
(plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0)) (plus:SI (ltu:SI (reg:CC_C CC_REGNUM) (const_int 0))
(plus:SI (plus:SI
(match_operator:SI 2 "shift_operator" (match_operator:SI 2 "shift_operator"
[(match_operand:SI 3 "s_register_operand" "") [(match_operand:SI 3 "s_register_operand" "r")
(match_operand:SI 4 "reg_or_int_operand" "")]) (match_operand:SI 4 "reg_or_int_operand" "rM")])
(match_operand:SI 1 "s_register_operand" ""))))] (match_operand:SI 1 "s_register_operand" "r"))))]
"TARGET_ARM" "TARGET_ARM"
"adc%?\\t%0, %1, %3%S2" "adc%?\\t%0, %1, %3%S2"
[(set_attr "conds" "use")] [(set_attr "conds" "use")]