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re PR target/78090 ([x86_64]: GCC allows integer register for inter unit conversion under -mtune-ctrl=^inter_unit_conversions .) 

PR target/78090
	* config/i386/constraints.md (Yc): New register constraint.
	* config/i386/i386.md (*float<SWI48:mode><MODEF:mode>2_mixed):
	Use Yc constraint for alternative 2 of operand 0.  Remove
	preferred_for_speed attribute.

testsuite/ChangeLog:

	PR target/78090
	* gcc.target/i386/conversion-2.c: Remove obsolete test.

From-SVN: r247036
This commit is contained in:
Uros Bizjak 2017-04-20 21:04:36 +02:00 committed by Uros Bizjak
parent 2414b02252
commit 2091733634
5 changed files with 19 additions and 41 deletions
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8
gcc/ChangeLog
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@ -1,3 +1,11 @@
2017-04-20 Uros Bizjak <ubizjak@gmail.com>
PR target/78090
* config/i386/constraints.md (Yc): New register constraint.
* config/i386/i386.md (*float<SWI48:mode><MODEF:mode>2_mixed):
Use Yc constraint for alternative 2 of operand 0. Remove
preferred_for_speed attribute.
2017-04-20 Alexander Monakov <amonakov@ispras.ru>
* omp-low.c (lower_lastprivate_clauses): Correct handling of linear and

5
gcc/config/i386/constraints.md
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@ -99,6 +99,7 @@
;; We use the Y prefix to denote any number of conditional register sets:
;; z First SSE register.
;; c SSE inter-unit conversions enabled
;; i SSE2 inter-unit moves to SSE register enabled
;; j SSE2 inter-unit moves from SSE register enabled
;; m MMX inter-unit moves to MMX register enabled
@ -117,6 +118,10 @@
(define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS"
"First SSE register (@code{%xmm0}).")
(define_register_constraint "Yc"
"TARGET_SSE && TARGET_INTER_UNIT_CONVERSIONS ? ALL_SSE_REGS : NO_REGS"
"@internal Any SSE register, when SSE and inter-unit conversions are enabled.")
(define_register_constraint "Yi"
"TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC ? ALL_SSE_REGS : NO_REGS"
"@internal Any SSE register, when SSE2 and inter-unit moves to vector registers are enabled.")

6
gcc/config/i386/i386.md
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@ -5207,7 +5207,7 @@
})
(define_insn "*float<SWI48:mode><MODEF:mode>2_mixed"
[(set (match_operand:MODEF 0 "register_operand" "=f,v,v")
[(set (match_operand:MODEF 0 "register_operand" "=f,Yc,v")
(float:MODEF
(match_operand:SWI48 1 "nonimmediate_operand" "m,r,m")))]
"SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH"
@ -5236,10 +5236,6 @@
&& X87_ENABLE_FLOAT (<MODEF:MODE>mode,
<SWI48:MODE>mode)")
]
(symbol_ref "true")))
(set (attr "preferred_for_speed")
(cond [(eq_attr "alternative" "1")
(symbol_ref "TARGET_INTER_UNIT_CONVERSIONS")]
(symbol_ref "true")))])
(define_insn "*float<SWI48x:mode><MODEF:mode>2_i387"

5
gcc/testsuite/ChangeLog
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@ -1,3 +1,8 @@
2017-04-20 Uros Bizjak <ubizjak@gmail.com>
PR target/78090
* gcc.target/i386/conversion-2.c: Remove obsolete test.
2017-04-20 David Edelsohn <dje.gcc@gmail.com>
* g++/opt/pr80436.C: XFAIL on AIX.

36
gcc/testsuite/gcc.target/i386/conversion-2.c
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@ -1,36 +0,0 @@
/* { dg-do compile } */
/* { dg-options "-O2 -fno-toplevel-reorder -mtune=bdver2" } */
/* { dg-additional-options "-mregparm=1 -msse -mfpmath=sse" { target ia32 } } */
void __attribute__ ((hot))
f1 (int x)
{
register float f asm ("%xmm0") = x;
asm volatile ("" :: "x" (f));
}
void __attribute__ ((cold))
f2 (int x)
{
register float f asm ("%xmm1") = x;
asm volatile ("" :: "x" (f));
}
void __attribute__ ((hot))
f3 (int x)
{
register float f asm ("%xmm2") = x;
asm volatile ("" :: "x" (f));
}
void __attribute__ ((cold))
f4 (int x)
{
register float f asm ("%xmm3") = x;
asm volatile ("" :: "x" (f));
}
/* { dg-final { scan-assembler "sp\\\), %xmm0" } } */
/* { dg-final { scan-assembler "(ax|di), %xmm1" } } */
/* { dg-final { scan-assembler "sp\\\), %xmm2" } } */
/* { dg-final { scan-assembler "(ax|di), %xmm3" } } */