mirror of git://gcc.gnu.org/git/gcc.git
builtins.c (expand_builtin_atomic_compare_exchange): Pass old value operand as MEM to expand_atomic_compare_and_swap.
* builtins.c (expand_builtin_atomic_compare_exchange): Pass old
value operand as MEM to expand_atomic_compare_and_swap.
* config/s390/s390.md ("atomic_compare_and_swap<mode>"): Accept
nonimmediate_operand for old value; generate load and store if
needed.
* config/s390/s390.c (s390_expand_cs_hqi): Accept any operand
as vtarget.
From-SVN: r190236
This commit is contained in:
parent
07c5a154bb
commit
215770ada8
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@ -1,3 +1,14 @@
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2012-08-08 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
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* builtins.c (expand_builtin_atomic_compare_exchange): Pass old
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value operand as MEM to expand_atomic_compare_and_swap.
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* config/s390/s390.md ("atomic_compare_and_swap<mode>"): Accept
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nonimmediate_operand for old value; generate load and store if
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needed.
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* config/s390/s390.c (s390_expand_cs_hqi): Accept any operand
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as vtarget.
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2012-08-08 Steven Bosscher <steven@gcc.gnu.org>
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PR middle-end/54146
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@ -5376,6 +5376,7 @@ expand_builtin_atomic_compare_exchange (enum machine_mode mode, tree exp,
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expect = expand_normal (CALL_EXPR_ARG (exp, 1));
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expect = convert_memory_address (Pmode, expect);
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expect = gen_rtx_MEM (mode, expect);
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desired = expand_expr_force_mode (CALL_EXPR_ARG (exp, 2), mode);
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weak = CALL_EXPR_ARG (exp, 3);
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@ -5383,14 +5384,15 @@ expand_builtin_atomic_compare_exchange (enum machine_mode mode, tree exp,
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if (host_integerp (weak, 0) && tree_low_cst (weak, 0) != 0)
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is_weak = true;
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oldval = copy_to_reg (gen_rtx_MEM (mode, expect));
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oldval = expect;
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if (!expand_atomic_compare_and_swap ((target == const0_rtx ? NULL : &target),
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&oldval, mem, oldval, desired,
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is_weak, success, failure))
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return NULL_RTX;
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emit_move_insn (gen_rtx_MEM (mode, expect), oldval);
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if (oldval != expect)
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emit_move_insn (expect, oldval);
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return target;
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}
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@ -4825,7 +4825,6 @@ s390_expand_cs_hqi (enum machine_mode mode, rtx btarget, rtx vtarget, rtx mem,
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rtx res = gen_reg_rtx (SImode);
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rtx csloop = NULL, csend = NULL;
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gcc_assert (register_operand (vtarget, VOIDmode));
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gcc_assert (MEM_P (mem));
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init_alignment_context (&ac, mem, mode);
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@ -8870,7 +8870,7 @@
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(define_expand "atomic_compare_and_swap<mode>"
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[(match_operand:SI 0 "register_operand") ;; bool success output
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(match_operand:DGPR 1 "register_operand") ;; oldval output
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(match_operand:DGPR 1 "nonimmediate_operand");; oldval output
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(match_operand:DGPR 2 "memory_operand") ;; memory
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(match_operand:DGPR 3 "register_operand") ;; expected intput
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(match_operand:DGPR 4 "register_operand") ;; newval intput
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@ -8879,9 +8879,22 @@
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(match_operand:SI 7 "const_int_operand")] ;; failure model
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""
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{
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rtx cc, cmp;
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rtx cc, cmp, output = operands[1];
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if (!register_operand (output, <MODE>mode))
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output = gen_reg_rtx (<MODE>mode);
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emit_insn (gen_atomic_compare_and_swap<mode>_internal
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(operands[1], operands[2], operands[3], operands[4]));
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(output, operands[2], operands[3], operands[4]));
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/* We deliberately accept non-register operands in the predicate
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to ensure the write back to the output operand happens *before*
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the store-flags code below. This makes it easier for combine
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to merge the store-flags code with a potential test-and-branch
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pattern following (immediately!) afterwards. */
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if (output != operands[1])
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emit_move_insn (operands[1], output);
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cc = gen_rtx_REG (CCZ1mode, CC_REGNUM);
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cmp = gen_rtx_EQ (SImode, cc, const0_rtx);
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emit_insn (gen_cstorecc4 (operands[0], cmp, cc, const0_rtx));
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@ -8890,7 +8903,7 @@
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(define_expand "atomic_compare_and_swap<mode>"
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[(match_operand:SI 0 "register_operand") ;; bool success output
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(match_operand:HQI 1 "register_operand") ;; oldval output
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(match_operand:HQI 1 "nonimmediate_operand") ;; oldval output
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(match_operand:HQI 2 "memory_operand") ;; memory
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(match_operand:HQI 3 "general_operand") ;; expected intput
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(match_operand:HQI 4 "general_operand") ;; newval intput
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