From 23fa65d6f34a3f93cff5bd3d250e3f366196ec3f Mon Sep 17 00:00:00 2001 From: Ramana Radhakrishnan Date: Wed, 24 Jun 2015 09:59:28 +0000 Subject: [PATCH] re PR target/66200 (GCC for ARM / AArch64 doesn't define TARGET_RELAXED_ORDERING) Fix PR target/66200 This applies the same fix for PR target/66200 for AArch64 on the GCC 5 branch as on the 4.9 branch. On trunk we've fixed this differently by optimizing the access to the guard variable using a load acquire style instruction. 2015-06-24 Ramana Radhakrishnan PR target/66200 * g++.dg/abi/aarch64_guard1.C: Adjust. 2015-06-24 Ramana Radhakrishnan PR target/66200 * configure.host (host_cpu): Add aarch64 case. * config/cpu/aarch64/atomic_word.h: New file. From-SVN: r224890 --- gcc/config/aarch64/aarch64.c | 3 ++ gcc/testsuite/ChangeLog | 5 +++ gcc/testsuite/g++.dg/abi/aarch64_guard1.C | 1 - libstdc++-v3/ChangeLog | 6 +++ libstdc++-v3/config/cpu/aarch64/atomic_word.h | 44 +++++++++++++++++++ libstdc++-v3/configure.host | 3 ++ 6 files changed, 61 insertions(+), 1 deletion(-) create mode 100644 libstdc++-v3/config/cpu/aarch64/atomic_word.h diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 3b104db68ebd..6f86ede742e8 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -11462,6 +11462,9 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load, #undef TARGET_SCHED_FUSION_PRIORITY #define TARGET_SCHED_FUSION_PRIORITY aarch64_sched_fusion_priority +#undef TARGET_RELAXED_ORDERING +#define TARGET_RELAXED_ORDERING true + struct gcc_target targetm = TARGET_INITIALIZER; #include "gt-aarch64.h" diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e4ba08179c21..8d7ebbd3a912 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-06-24 Ramana Radhakrishnan + + PR target/66200 + * g++.dg/abi/aarch64_guard1.C: Adjust. + 2015-06-24 Mikael Morin PR fortran/66549 diff --git a/gcc/testsuite/g++.dg/abi/aarch64_guard1.C b/gcc/testsuite/g++.dg/abi/aarch64_guard1.C index ca1778b87306..e78f93cd27b8 100644 --- a/gcc/testsuite/g++.dg/abi/aarch64_guard1.C +++ b/gcc/testsuite/g++.dg/abi/aarch64_guard1.C @@ -13,5 +13,4 @@ int *foo () } // { dg-final { scan-assembler _ZGVZ3foovE1x,8,8 } } -// { dg-final { scan-tree-dump "_ZGVZ3foovE1x & 1" "original" } } // { dg-final { cleanup-tree-dump "original" } } diff --git a/libstdc++-v3/ChangeLog b/libstdc++-v3/ChangeLog index b7a6ce684e0f..86aec989aaa3 100644 --- a/libstdc++-v3/ChangeLog +++ b/libstdc++-v3/ChangeLog @@ -1,3 +1,9 @@ +2015-06-24 Ramana Radhakrishnan + + PR target/66200 + * configure.host (host_cpu): Add aarch64 case. + * config/cpu/aarch64/atomic_word.h: New file. + 2015-06-22 Jonathan Wakely Backport from mainline diff --git a/libstdc++-v3/config/cpu/aarch64/atomic_word.h b/libstdc++-v3/config/cpu/aarch64/atomic_word.h new file mode 100644 index 000000000000..4dbfb3082604 --- /dev/null +++ b/libstdc++-v3/config/cpu/aarch64/atomic_word.h @@ -0,0 +1,44 @@ +// Low-level type for atomic operations -*- C++ -*- + +// Copyright (C) 2015 Free Software Foundation, Inc. +// +// This file is part of the GNU ISO C++ Library. This library is free +// software; you can redistribute it and/or modify it under the +// terms of the GNU General Public License as published by the +// Free Software Foundation; either version 3, or (at your option) +// any later version. + +// This library is distributed in the hope that it will be useful, +// but WITHOUT ANY WARRANTY; without even the implied warranty of +// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +// GNU General Public License for more details. + +// Under Section 7 of GPL version 3, you are granted additional +// permissions described in the GCC Runtime Library Exception, version +// 3.1, as published by the Free Software Foundation. + +// You should have received a copy of the GNU General Public License and +// a copy of the GCC Runtime Library Exception along with this program; +// see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +// . + +/** @file atomic_word.h + * This file is a GNU extension to the Standard C++ Library. + */ + +#ifndef _GLIBCXX_ATOMIC_WORD_H +#define _GLIBCXX_ATOMIC_WORD_H 1 + + +typedef int _Atomic_word; + +// This one prevents loads from being hoisted across the barrier; +// in other words, this is a Load-Load acquire barrier. +// This is necessary iff TARGET_RELAXED_ORDERING is defined in tm.h. +#define _GLIBCXX_READ_MEM_BARRIER __atomic_thread_fence (__ATOMIC_ACQUIRE) + +// This one prevents stores from being sunk across the barrier; in other +// words, a Store-Store release barrier. +#define _GLIBCXX_WRITE_MEM_BARRIER __atomic_thread_fence (__ATOMIC_RELEASE) + +#endif diff --git a/libstdc++-v3/configure.host b/libstdc++-v3/configure.host index c77984d56eda..640199c3d739 100644 --- a/libstdc++-v3/configure.host +++ b/libstdc++-v3/configure.host @@ -153,6 +153,9 @@ esac # Most can just use generic. # THIS TABLE IS SORTED. KEEP IT THAT WAY. case "${host_cpu}" in + aarch64*) + atomic_word_dir=cpu/aarch64 + ;; alpha*) atomic_word_dir=cpu/alpha ;;