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sse.md (copysign<mode>3): Use "and-not" SSE instruction instead of "and" with inverted sign bit mask value. 

* config/i386/sse.md (copysign<mode>3): Use "and-not" SSE instruction
	instead of "and" with inverted sign bit mask value.  Use
	"nonimmediate_operand" for operand 1 and operand 2 predicate.
	Allocate registers only for operand 4 and operand 5.

From-SVN: r149691
This commit is contained in:
Uros Bizjak 2009-07-15 17:40:15 +02:00 committed by Uros Bizjak
parent 1fba7394b0
commit 31f44cd09a
2 changed files with 15 additions and 13 deletions
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6
gcc/ChangeLog
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@ -1,7 +1,9 @@
2009-07-15 Uros Bizjak <ubizjak@gmail.com> 2009-07-15 Uros Bizjak <ubizjak@gmail.com>
* config/i386/sse.md (copysign<mode>3): Allocate registers only for * config/i386/sse.md (copysign<mode>3): Use "and-not" SSE instruction
operands[5] and operands[6]. instead of "and" with inverted sign bit mask value. Use
"nonimmediate_operand" for operand 1 and operand 2 predicate.
Allocate registers only for operand 4 and operand 5.
2009-07-15 Jakub Jelinek <jakub@redhat.com> 2009-07-15 Jakub Jelinek <jakub@redhat.com>

20
gcc/config/i386/sse.md
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@ -1595,21 +1595,21 @@
(set_attr "mode" "<MODE>")]) (set_attr "mode" "<MODE>")])
(define_expand "copysign<mode>3" (define_expand "copysign<mode>3"
[(set (match_dup 5) [(set (match_dup 4)
(and:SSEMODEF2P (match_operand:SSEMODEF2P 1 "register_operand" "") (and:SSEMODEF2P
(match_dup 3))) (not:SSEMODEF2P (match_dup 3))
(set (match_dup 6) (match_operand:SSEMODEF2P 1 "nonimmediate_operand" "")))
(and:SSEMODEF2P (match_operand:SSEMODEF2P 2 "register_operand" "") (set (match_dup 5)
(match_dup 4))) (and:SSEMODEF2P (match_dup 3)
(match_operand:SSEMODEF2P 2 "nonimmediate_operand" "")))
(set (match_operand:SSEMODEF2P 0 "register_operand" "") (set (match_operand:SSEMODEF2P 0 "register_operand" "")
(ior:SSEMODEF2P (match_dup 5) (match_dup 6)))] (ior:SSEMODEF2P (match_dup 4) (match_dup 5)))]
"SSE_VEC_FLOAT_MODE_P (<MODE>mode)" "SSE_VEC_FLOAT_MODE_P (<MODE>mode)"
{ {
operands[3] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 1); operands[3] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 0);
operands[4] = ix86_build_signbit_mask (<ssescalarmode>mode, 1, 0);
operands[4] = gen_reg_rtx (<MODE>mode);
operands[5] = gen_reg_rtx (<MODE>mode); operands[5] = gen_reg_rtx (<MODE>mode);
operands[6] = gen_reg_rtx (<MODE>mode);
}) })
;; Also define scalar versions. These are used for abs, neg, and ;; Also define scalar versions. These are used for abs, neg, and