RISC-V: Fix *sge<u>_<X:mode><GPR:mode> pattern

*sge<u>_<X:mode><GPR:mode> pattern has referenced operand[2] which is
invalid...it should just use `slti<u>` rather than `slti%i2<u>`.

gcc/ChangeLog:

	PR target/106543
	* config/riscv/riscv.md (*sge<u>_<X:mode><GPR:mode>): Fix asm
	pattern.
This commit is contained in:
Kito Cheng 2024-02-16 17:27:24 +08:00
parent de658585d6
commit 325d5dd532
1 changed files with 1 additions and 1 deletions

View File

@ -3107,7 +3107,7 @@
(any_ge:GPR (match_operand:X 1 "register_operand" " r")
(const_int 1)))]
""
"slt%i2<u>\t%0,zero,%1"
"slti<u>\t%0,zero,%1"
[(set_attr "type" "slt")
(set_attr "mode" "<X:MODE>")])