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[1/3][ARM] Keep ctz expressions together until after reload 

PR middle-end/37780
	* config/arm/arm.md (ctzsi2): Convert to define_insn_and_split.

From-SVN: r237138
This commit is contained in:
Kyrylo Tkachov 2016-06-06 15:59:48 +00:00 committed by Kyrylo Tkachov
parent 5545a90715
commit 3295b529d2
2 changed files with 19 additions and 11 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2016-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR middle-end/37780
* config/arm/arm.md (ctzsi2): Convert to define_insn_and_split.
2016-06-06 Bernd Edlinger <bernd.edlinger@hotmail.de> 2016-06-06 Bernd Edlinger <bernd.edlinger@hotmail.de>
PR c/24414 PR c/24414

23
gcc/config/arm/arm.md
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@ -10822,19 +10822,22 @@
(set_attr "predicable_short_it" "no") (set_attr "predicable_short_it" "no")
(set_attr "type" "clz")]) (set_attr "type" "clz")])
(define_expand "ctzsi2" ;; Keep this as a CTZ expression until after reload and then split
[(set (match_operand:SI 0 "s_register_operand" "") ;; into RBIT + CLZ. Since RBIT is represented as an UNSPEC it is unlikely
(ctz:SI (match_operand:SI 1 "s_register_operand" "")))] ;; to fold with any other expression.
(define_insn_and_split "ctzsi2"
[(set (match_operand:SI 0 "s_register_operand" "=r")
(ctz:SI (match_operand:SI 1 "s_register_operand" "r")))]
"TARGET_32BIT && arm_arch_thumb2" "TARGET_32BIT && arm_arch_thumb2"
"#"
"&& reload_completed"
[(const_int 0)]
" "
{ emit_insn (gen_rbitsi2 (operands[0], operands[1]));
rtx tmp = gen_reg_rtx (SImode); emit_insn (gen_clzsi2 (operands[0], operands[0]));
emit_insn (gen_rbitsi2 (tmp, operands[1]));
emit_insn (gen_clzsi2 (operands[0], tmp));
}
DONE; DONE;
" ")
)
;; V5E instructions. ;; V5E instructions.