[ARM] PR target/64600 Fix another ICE with -mtune=xscale: properly sign-extend mask during constant splitting

PR target/64600
	* config/arm/arm.c (arm_gen_constant, AND case): Use
	ARM_SIGN_EXTEND when constructing AND mask.

	PR target/64600
	* gcc.target/arm/pr64600_1.c: New test.

From-SVN: r221413
This commit is contained in:
Kyrylo Tkachov 2015-03-13 10:48:44 +00:00 committed by Kyrylo Tkachov
parent 7088e2b0e8
commit 34f1d42665
4 changed files with 35 additions and 8 deletions

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@ -1,3 +1,9 @@
2015-03-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/64600
* config/arm/arm.c (arm_gen_constant, AND case): Use
ARM_SIGN_EXTEND when constructing AND mask.
2015-03-13 Thomas Preud'homme <thomas.preudhomme@arm.com>
* graph.c (print_graph_cfg): Make function names visible and append

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@ -4536,19 +4536,20 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
if ((remainder | shift_mask) != 0xffffffff)
{
HOST_WIDE_INT new_val
= ARM_SIGN_EXTEND (remainder | shift_mask);
if (generate)
{
rtx new_src = subtargets ? gen_reg_rtx (mode) : target;
insns = arm_gen_constant (AND, mode, cond,
remainder | shift_mask,
insns = arm_gen_constant (AND, SImode, cond, new_val,
new_src, source, subtargets, 1);
source = new_src;
}
else
{
rtx targ = subtargets ? NULL_RTX : target;
insns = arm_gen_constant (AND, mode, cond,
remainder | shift_mask,
insns = arm_gen_constant (AND, mode, cond, new_val,
targ, source, subtargets, 0);
}
}
@ -4571,12 +4572,13 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
if ((remainder | shift_mask) != 0xffffffff)
{
HOST_WIDE_INT new_val
= ARM_SIGN_EXTEND (remainder | shift_mask);
if (generate)
{
rtx new_src = subtargets ? gen_reg_rtx (mode) : target;
insns = arm_gen_constant (AND, mode, cond,
remainder | shift_mask,
insns = arm_gen_constant (AND, mode, cond, new_val,
new_src, source, subtargets, 1);
source = new_src;
}
@ -4584,8 +4586,7 @@ arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond,
{
rtx targ = subtargets ? NULL_RTX : target;
insns = arm_gen_constant (AND, mode, cond,
remainder | shift_mask,
insns = arm_gen_constant (AND, mode, cond, new_val,
targ, source, subtargets, 0);
}
}

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@ -1,3 +1,8 @@
2015-03-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR target/64600
* gcc.target/arm/pr64600_1.c: New test.
2015-03-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
PR rtl-optimization/65235

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@ -0,0 +1,15 @@
/* { dg-do compile } */
/* { dg-options "-O2 -mtune=xscale" } */
typedef unsigned int speed_t;
typedef unsigned int tcflag_t;
struct termios {
tcflag_t c_cflag;
};
speed_t
cfgetospeed (const struct termios *tp)
{
return tp->c_cflag & 010017;
}