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arm.md (f_minmaxs, f_minmaxd): New types.
gcc/ 2012-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/arm.md (f_minmaxs, f_minmaxd): New types. * config/arm/vfp.md (smax<mode>3): New pattern. (smin<mode>3): Likewise. gcc/testsuite/ 2012-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * gcc.target/arm/vmaxnmdf.c: New test. * gcc.target/arm/vmaxnmsf.c: Likewise. * gcc.target/arm/vminnmsf.c: Likewise. * gcc.target/arm/vminnmdf.c: Likewise. From-SVN: r194612
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2012-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* config/arm/arm.md (f_minmaxs, f_minmaxd): New types.
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* config/arm/vfp.md (smax<mode>3): New pattern.
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(smin<mode>3): Likewise.
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2012-12-19 Richard Biener <rguenther@suse.de>
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* targhooks.h (default_canonicalize_comparison): Fix prototype.
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@ -286,6 +286,8 @@
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fmacd,\
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f_rints,\
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f_rintd,\
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f_minmaxs,\
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f_minmaxd,\
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f_flag,\
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f_loads,\
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f_loadd,\
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@ -1265,6 +1265,31 @@
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(set_attr "type" "f_rint<vfp_type>")]
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)
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;; MIN_EXPR and MAX_EXPR eventually map to 'smin' and 'smax' in RTL.
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;; The 'smax' and 'smin' RTL standard pattern names do not specify which
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;; operand will be returned when both operands are zero (i.e. they may not
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;; honour signed zeroes), or when either operand is NaN. Therefore GCC
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;; only introduces MIN_EXPR/MAX_EXPR in fast math mode or when not honouring
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;; NaNs.
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(define_insn "smax<mode>3"
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[(set (match_operand:SDF 0 "register_operand" "=<F_constraint>")
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(smax:SDF (match_operand:SDF 1 "register_operand" "<F_constraint>")
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(match_operand:SDF 2 "register_operand" "<F_constraint>")))]
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"TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"
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"vmaxnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
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[(set_attr "type" "f_minmax<vfp_type>")]
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)
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(define_insn "smin<mode>3"
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[(set (match_operand:SDF 0 "register_operand" "=<F_constraint>")
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(smin:SDF (match_operand:SDF 1 "register_operand" "<F_constraint>")
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(match_operand:SDF 2 "register_operand" "<F_constraint>")))]
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"TARGET_HARD_FLOAT && TARGET_FPU_ARMV8 <vfp_double_cond>"
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"vminnm.<V_if_elem>\\t%<V_reg>0, %<V_reg>1, %<V_reg>2"
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[(set_attr "type" "f_minmax<vfp_type>")]
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)
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;; Unimplemented insns:
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;; fldm*
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;; fstm*
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2012-12-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
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* gcc.target/arm/vmaxnmdf.c: New test.
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* gcc.target/arm/vmaxnmsf.c: Likewise.
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* gcc.target/arm/vminnmsf.c: Likewise.
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* gcc.target/arm/vminnmdf.c: Likewise.
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2012-12-19 Tobias Burnus <burnus@net-b.de>
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* gfortran.dg/gomp/use_intrinsic_1.f90: Moved
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/* { dg-do compile } */
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/* { dg-require-effective-target arm_v8_vfp_ok } */
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/* { dg-options "-ffast-math" } */
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/* { dg-add-options arm_v8_vfp } */
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double
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foo (double x, double y)
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{
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return __builtin_fmax (x, y);
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}
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/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+" 1 } } */
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/* { dg-do compile } */
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/* { dg-require-effective-target arm_v8_vfp_ok } */
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/* { dg-options "-ffast-math" } */
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/* { dg-add-options arm_v8_vfp } */
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float
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foo (float x, float y)
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{
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return __builtin_fmaxf (x, y);
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}
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/* { dg-final { scan-assembler-times "vmaxnm.f32\ts\[0-9\]+" 1 } } */
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/* { dg-do compile } */
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/* { dg-require-effective-target arm_v8_vfp_ok } */
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/* { dg-options "-ffast-math" } */
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/* { dg-add-options arm_v8_vfp } */
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double
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foo (double x, double y)
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{
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return __builtin_fmin (x, y);
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}
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/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+" 1 } } */
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/* { dg-do compile } */
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/* { dg-require-effective-target arm_v8_vfp_ok } */
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/* { dg-options "-ffast-math" } */
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/* { dg-add-options arm_v8_vfp } */
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float
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foo (float x, float y)
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{
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return __builtin_fminf (x, y);
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}
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/* { dg-final { scan-assembler-times "vminnm.f32\ts\[0-9\]+" 1 } } */
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