mirror of git://gcc.gnu.org/git/gcc.git
rs6000.c (rs6000_pre_atomic_barrier): Remove SYNC variants cases from switch.
* config/rs6000/rs6000.c (rs6000_pre_atomic_barrier): Remove SYNC
variants cases from switch.
(rs6000_post_atomic_barrier): Same.
(rs6000_expand_atomic_compare_and_swap): Use memmodel_base.
(rs6000_expand_atomic_exchange): Same.
(rs6000_expand_atomic_op): Same.
* config/rs6000/sync.md (mem_thread_fence): Use memodel_base. Remove
SYNC variants cases from switch.
(atomic_load): Same.
(atomic_store): Same.
From-SVN: r224401
This commit is contained in:
parent
7672ab25db
commit
39e150e85f
|
|
@ -1,3 +1,16 @@
|
||||||
|
2015-06-11 David Edelsohn <dje.gcc@gmail.com>
|
||||||
|
|
||||||
|
* config/rs6000/rs6000.c (rs6000_pre_atomic_barrier): Remove SYNC
|
||||||
|
variants cases from switch.
|
||||||
|
(rs6000_post_atomic_barrier): Same.
|
||||||
|
(rs6000_expand_atomic_compare_and_swap): Use memmodel_base.
|
||||||
|
(rs6000_expand_atomic_exchange): Same.
|
||||||
|
(rs6000_expand_atomic_op): Same.
|
||||||
|
* config/rs6000/sync.md (mem_thread_fence): Use memodel_base. Remove
|
||||||
|
SYNC variants cases from switch.
|
||||||
|
(atomic_load): Same.
|
||||||
|
(atomic_store): Same.
|
||||||
|
|
||||||
2015-06-11 John David Anglin <danglin@gcc.gnu.org>
|
2015-06-11 John David Anglin <danglin@gcc.gnu.org>
|
||||||
|
|
||||||
* config/pa/pa.c (pa_output_global_address): Handle LABEL_REF plus
|
* config/pa/pa.c (pa_output_global_address): Handle LABEL_REF plus
|
||||||
|
|
|
||||||
|
|
@ -20558,15 +20558,12 @@ rs6000_pre_atomic_barrier (rtx mem, enum memmodel model)
|
||||||
case MEMMODEL_RELAXED:
|
case MEMMODEL_RELAXED:
|
||||||
case MEMMODEL_CONSUME:
|
case MEMMODEL_CONSUME:
|
||||||
case MEMMODEL_ACQUIRE:
|
case MEMMODEL_ACQUIRE:
|
||||||
case MEMMODEL_SYNC_ACQUIRE:
|
|
||||||
break;
|
break;
|
||||||
case MEMMODEL_RELEASE:
|
case MEMMODEL_RELEASE:
|
||||||
case MEMMODEL_SYNC_RELEASE:
|
|
||||||
case MEMMODEL_ACQ_REL:
|
case MEMMODEL_ACQ_REL:
|
||||||
emit_insn (gen_lwsync ());
|
emit_insn (gen_lwsync ());
|
||||||
break;
|
break;
|
||||||
case MEMMODEL_SEQ_CST:
|
case MEMMODEL_SEQ_CST:
|
||||||
case MEMMODEL_SYNC_SEQ_CST:
|
|
||||||
emit_insn (gen_hwsync ());
|
emit_insn (gen_hwsync ());
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
@ -20583,13 +20580,10 @@ rs6000_post_atomic_barrier (enum memmodel model)
|
||||||
case MEMMODEL_RELAXED:
|
case MEMMODEL_RELAXED:
|
||||||
case MEMMODEL_CONSUME:
|
case MEMMODEL_CONSUME:
|
||||||
case MEMMODEL_RELEASE:
|
case MEMMODEL_RELEASE:
|
||||||
case MEMMODEL_SYNC_RELEASE:
|
|
||||||
break;
|
break;
|
||||||
case MEMMODEL_ACQUIRE:
|
case MEMMODEL_ACQUIRE:
|
||||||
case MEMMODEL_SYNC_ACQUIRE:
|
|
||||||
case MEMMODEL_ACQ_REL:
|
case MEMMODEL_ACQ_REL:
|
||||||
case MEMMODEL_SEQ_CST:
|
case MEMMODEL_SEQ_CST:
|
||||||
case MEMMODEL_SYNC_SEQ_CST:
|
|
||||||
emit_insn (gen_isync ());
|
emit_insn (gen_isync ());
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
@ -20690,8 +20684,8 @@ rs6000_expand_atomic_compare_and_swap (rtx operands[])
|
||||||
oldval = operands[3];
|
oldval = operands[3];
|
||||||
newval = operands[4];
|
newval = operands[4];
|
||||||
is_weak = (INTVAL (operands[5]) != 0);
|
is_weak = (INTVAL (operands[5]) != 0);
|
||||||
mod_s = memmodel_from_int (INTVAL (operands[6]));
|
mod_s = memmodel_base (INTVAL (operands[6]));
|
||||||
mod_f = memmodel_from_int (INTVAL (operands[7]));
|
mod_f = memmodel_base (INTVAL (operands[7]));
|
||||||
orig_mode = mode = GET_MODE (mem);
|
orig_mode = mode = GET_MODE (mem);
|
||||||
|
|
||||||
mask = shift = NULL_RTX;
|
mask = shift = NULL_RTX;
|
||||||
|
|
@ -20810,7 +20804,7 @@ rs6000_expand_atomic_exchange (rtx operands[])
|
||||||
retval = operands[0];
|
retval = operands[0];
|
||||||
mem = operands[1];
|
mem = operands[1];
|
||||||
val = operands[2];
|
val = operands[2];
|
||||||
model = (enum memmodel) INTVAL (operands[3]);
|
model = memmodel_base (INTVAL (operands[3]));
|
||||||
mode = GET_MODE (mem);
|
mode = GET_MODE (mem);
|
||||||
|
|
||||||
mask = shift = NULL_RTX;
|
mask = shift = NULL_RTX;
|
||||||
|
|
@ -20861,7 +20855,7 @@ void
|
||||||
rs6000_expand_atomic_op (enum rtx_code code, rtx mem, rtx val,
|
rs6000_expand_atomic_op (enum rtx_code code, rtx mem, rtx val,
|
||||||
rtx orig_before, rtx orig_after, rtx model_rtx)
|
rtx orig_before, rtx orig_after, rtx model_rtx)
|
||||||
{
|
{
|
||||||
enum memmodel model = (enum memmodel) INTVAL (model_rtx);
|
enum memmodel model = memmodel_base (INTVAL (model_rtx));
|
||||||
machine_mode mode = GET_MODE (mem);
|
machine_mode mode = GET_MODE (mem);
|
||||||
machine_mode store_mode = mode;
|
machine_mode store_mode = mode;
|
||||||
rtx label, x, cond, mask, shift;
|
rtx label, x, cond, mask, shift;
|
||||||
|
|
|
||||||
|
|
@ -41,21 +41,18 @@
|
||||||
[(match_operand:SI 0 "const_int_operand" "")] ;; model
|
[(match_operand:SI 0 "const_int_operand" "")] ;; model
|
||||||
""
|
""
|
||||||
{
|
{
|
||||||
enum memmodel model = memmodel_from_int (INTVAL (operands[0]));
|
enum memmodel model = memmodel_base (INTVAL (operands[0]));
|
||||||
switch (model)
|
switch (model)
|
||||||
{
|
{
|
||||||
case MEMMODEL_RELAXED:
|
case MEMMODEL_RELAXED:
|
||||||
break;
|
break;
|
||||||
case MEMMODEL_CONSUME:
|
case MEMMODEL_CONSUME:
|
||||||
case MEMMODEL_ACQUIRE:
|
case MEMMODEL_ACQUIRE:
|
||||||
case MEMMODEL_SYNC_ACQUIRE:
|
|
||||||
case MEMMODEL_RELEASE:
|
case MEMMODEL_RELEASE:
|
||||||
case MEMMODEL_SYNC_RELEASE:
|
|
||||||
case MEMMODEL_ACQ_REL:
|
case MEMMODEL_ACQ_REL:
|
||||||
emit_insn (gen_lwsync ());
|
emit_insn (gen_lwsync ());
|
||||||
break;
|
break;
|
||||||
case MEMMODEL_SEQ_CST:
|
case MEMMODEL_SEQ_CST:
|
||||||
case MEMMODEL_SYNC_SEQ_CST:
|
|
||||||
emit_insn (gen_hwsync ());
|
emit_insn (gen_hwsync ());
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
@ -147,7 +144,7 @@
|
||||||
if (<MODE>mode == TImode && !TARGET_SYNC_TI)
|
if (<MODE>mode == TImode && !TARGET_SYNC_TI)
|
||||||
FAIL;
|
FAIL;
|
||||||
|
|
||||||
enum memmodel model = memmodel_from_int (INTVAL (operands[2]));
|
enum memmodel model = memmodel_base (INTVAL (operands[2]));
|
||||||
|
|
||||||
if (is_mm_seq_cst (model))
|
if (is_mm_seq_cst (model))
|
||||||
emit_insn (gen_hwsync ());
|
emit_insn (gen_hwsync ());
|
||||||
|
|
@ -185,9 +182,7 @@
|
||||||
break;
|
break;
|
||||||
case MEMMODEL_CONSUME:
|
case MEMMODEL_CONSUME:
|
||||||
case MEMMODEL_ACQUIRE:
|
case MEMMODEL_ACQUIRE:
|
||||||
case MEMMODEL_SYNC_ACQUIRE:
|
|
||||||
case MEMMODEL_SEQ_CST:
|
case MEMMODEL_SEQ_CST:
|
||||||
case MEMMODEL_SYNC_SEQ_CST:
|
|
||||||
emit_insn (gen_loadsync_<mode> (operands[0]));
|
emit_insn (gen_loadsync_<mode> (operands[0]));
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
@ -214,17 +209,15 @@
|
||||||
if (<MODE>mode == TImode && !TARGET_SYNC_TI)
|
if (<MODE>mode == TImode && !TARGET_SYNC_TI)
|
||||||
FAIL;
|
FAIL;
|
||||||
|
|
||||||
enum memmodel model = memmodel_from_int (INTVAL (operands[2]));
|
enum memmodel model = memmodel_base (INTVAL (operands[2]));
|
||||||
switch (model)
|
switch (model)
|
||||||
{
|
{
|
||||||
case MEMMODEL_RELAXED:
|
case MEMMODEL_RELAXED:
|
||||||
break;
|
break;
|
||||||
case MEMMODEL_RELEASE:
|
case MEMMODEL_RELEASE:
|
||||||
case MEMMODEL_SYNC_RELEASE:
|
|
||||||
emit_insn (gen_lwsync ());
|
emit_insn (gen_lwsync ());
|
||||||
break;
|
break;
|
||||||
case MEMMODEL_SEQ_CST:
|
case MEMMODEL_SEQ_CST:
|
||||||
case MEMMODEL_SYNC_SEQ_CST:
|
|
||||||
emit_insn (gen_hwsync ());
|
emit_insn (gen_hwsync ());
|
||||||
break;
|
break;
|
||||||
default:
|
default:
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue