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mips-tables.opt: Update. 

* config/mips/mips-tables.opt: Update.
	* config/mips/mips.md (processor): Add xlp.
	* config/mips/mips-cpus.def: Add xlp.
	* config/mips/mips.c (mips_rtx_cost_data): Add costs for XLP, copy from
	5KF for now.
	* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Handle xlp.
	* doc/invoke.texi: Mention XLP.

From-SVN: r185712
This commit is contained in:
Maxim Kuvyrkov 2012-03-22 21:04:48 +00:00 committed by Maxim Kuvyrkov
parent d4655dc7dd
commit 3fd03b9340
7 changed files with 32 additions and 3 deletions
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10
gcc/ChangeLog
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@ -1,3 +1,13 @@
2012-03-22 Maxim Kuvyrkov <maxim@codesourcery.com>
* config/mips/mips-tables.opt: Update.
* config/mips/mips.md (processor): Add xlp.
* config/mips/mips-cpus.def: Add xlp.
* config/mips/mips.c (mips_rtx_cost_data): Add costs for XLP, copy from
5KF for now.
* config/mips/mips.h (MIPS_ISA_LEVEL_SPEC): Handle xlp.
* doc/invoke.texi: Mention XLP.
2012-03-22 Jakub Jelinek <jakub@redhat.com> 2012-03-22 Jakub Jelinek <jakub@redhat.com>
PR middle-end/52547 PR middle-end/52547

1
gcc/config/mips/mips-cpus.def
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@ -147,3 +147,4 @@ MIPS_CPU ("loongson3a", PROCESSOR_LOONGSON_3A, 64, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("octeon", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY) MIPS_CPU ("octeon", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("octeon+", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY) MIPS_CPU ("octeon+", PROCESSOR_OCTEON, 65, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("octeon2", PROCESSOR_OCTEON2, 65, PTF_AVOID_BRANCHLIKELY) MIPS_CPU ("octeon2", PROCESSOR_OCTEON2, 65, PTF_AVOID_BRANCHLIKELY)
MIPS_CPU ("xlp", PROCESSOR_XLP, 65, PTF_AVOID_BRANCHLIKELY)

3
gcc/config/mips/mips-tables.opt
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@ -609,3 +609,6 @@ Enum(mips_arch_opt_value) String(octeon+) Value(81) Canonical
EnumValue EnumValue
Enum(mips_arch_opt_value) String(octeon2) Value(82) Canonical Enum(mips_arch_opt_value) String(octeon2) Value(82) Canonical
EnumValue
Enum(mips_arch_opt_value) String(xlp) Value(83) Canonical

14
gcc/config/mips/mips.c
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@ -1086,6 +1086,20 @@ static const struct mips_rtx_cost_data
COSTS_N_INSNS (72), /* int_div_di */ COSTS_N_INSNS (72), /* int_div_di */
1, /* branch_cost */ 1, /* branch_cost */
4 /* memory_latency */ 4 /* memory_latency */
},
{ /* XLP */
/* These costs are the same as 5KF above. */
COSTS_N_INSNS (4), /* fp_add */
COSTS_N_INSNS (4), /* fp_mult_sf */
COSTS_N_INSNS (5), /* fp_mult_df */
COSTS_N_INSNS (17), /* fp_div_sf */
COSTS_N_INSNS (32), /* fp_div_df */
COSTS_N_INSNS (4), /* int_mult_si */
COSTS_N_INSNS (11), /* int_mult_di */
COSTS_N_INSNS (36), /* int_div_si */
COSTS_N_INSNS (68), /* int_div_di */
1, /* branch_cost */
4 /* memory_latency */
} }
}; };

2
gcc/config/mips/mips.h
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@ -701,7 +701,7 @@ struct mips_cpu_info {
|march=34k*|march=74k*|march=1004k*: -mips32r2} \ |march=34k*|march=74k*|march=1004k*: -mips32r2} \
%{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000 \ %{march=mips64|march=5k*|march=20k*|march=sb1*|march=sr71000 \
|march=xlr|march=loongson3a: -mips64} \ |march=xlr|march=loongson3a: -mips64} \
%{march=mips64r2|march=octeon: -mips64r2} \ %{march=mips64r2|march=octeon|march=xlp: -mips64r2} \
%{!march=*: -" MULTILIB_ISA_DEFAULT "}}" %{!march=*: -" MULTILIB_ISA_DEFAULT "}}"
/* A spec that infers a -mhard-float or -msoft-float setting from an /* A spec that infers a -mhard-float or -msoft-float setting from an

1
gcc/config/mips/mips.md
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@ -65,6 +65,7 @@
sb1a sb1a
sr71000 sr71000
xlr xlr
xlp
]) ])
(define_c_enum "unspec" [ (define_c_enum "unspec" [

4
gcc/doc/invoke.texi
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@ -15284,8 +15284,8 @@ The processor names are:
@samp{sb1}, @samp{sb1},
@samp{sr71000}, @samp{sr71000},
@samp{vr4100}, @samp{vr4111}, @samp{vr4120}, @samp{vr4130}, @samp{vr4300}, @samp{vr4100}, @samp{vr4111}, @samp{vr4120}, @samp{vr4130}, @samp{vr4300},
@samp{vr5000}, @samp{vr5400}, @samp{vr5500} @samp{vr5000}, @samp{vr5400}, @samp{vr5500},
and @samp{xlr}. @samp{xlr} and @samp{xlp}.
The special value @samp{from-abi} selects the The special value @samp{from-abi} selects the
most compatible architecture for the selected ABI (that is, most compatible architecture for the selected ABI (that is,
@samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@. @samp{mips1} for 32-bit ABIs and @samp{mips3} for 64-bit ABIs)@.