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rs6000.md (define_attr "type"): New type popcnt. 

2012-06-22  Edmar Wienskoski  <edmar@freescale.com>

	* config/rs6000/rs6000.md (define_attr "type"): New type popcnt.
	(popcntb<mode>2): Add attribute type popcnt.
	(popcntd<mode>2): Ditto.
	* config/rs6000/power4.md (define_insn_reservation): Add type popcnt.
	* config/rs6000/power5.md (define_insn_reservation): Ditto.
	* config/rs6000/power7.md (define_insn_reservation): Ditto.
	* config/rs6000/476.md (define_insn_reservation): Ditto.
	* config/rs6000/power6.md (define_insn_reservation): New
	reservation for popcnt instructions.

From-SVN: r188901
This commit is contained in:
Edmar Wienskoski 2012-06-22 20:13:23 +00:00 committed by Edmar Wienskoski
parent 50c7ad7e68
commit 42533d77ac
6 changed files with 27 additions and 6 deletions
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12
gcc/ChangeLog
View File

@ -1,3 +1,15 @@
2012-06-22 Edmar Wienskoski <edmar@freescale.com>
* config/rs6000/rs6000.md (define_attr "type"): New type popcnt.
(popcntb<mode>2): Add attribute type popcnt.
(popcntd<mode>2): Ditto.
* config/rs6000/power4.md (define_insn_reservation): Add type popcnt.
* config/rs6000/power5.md (define_insn_reservation): Ditto.
* config/rs6000/power7.md (define_insn_reservation): Ditto.
* config/rs6000/476.md (define_insn_reservation): Ditto.
* config/rs6000/power6.md (define_insn_reservation): New
reservation for popcnt instructions.
2012-06-22 H.J. Lu <hongjiu.lu@intel.com>
* doc/invoke.texi: Update -mpreferred-stack-boundary=3 warning.

2
gcc/config/rs6000/476.md
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@ -71,7 +71,7 @@
ppc476_i_pipe|ppc476_lj_pipe")
(define_insn_reservation "ppc476-complex-integer" 1
(and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap")
(and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap,popcnt")
(eq_attr "cpu" "ppc476"))
"ppc476_issue,\
ppc476_i_pipe")

2
gcc/config/rs6000/power5.md
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@ -142,7 +142,7 @@
; Integer latency is 2 cycles
(define_insn_reservation "power5-integer" 2
(and (eq_attr "type" "integer,insert_dword,shift,trap,\
var_shift_rotate,cntlz,exts,isel")
var_shift_rotate,cntlz,exts,isel,popcnt")
(eq_attr "cpu" "power5"))
"iq_power5")

5
gcc/config/rs6000/power6.md
View File

@ -216,6 +216,11 @@
(eq_attr "cpu" "power6"))
"FXU_power6")
(define_insn_reservation "power6-popcnt" 1
(and (eq_attr "type" "popcnt")
(eq_attr "cpu" "power6"))
"FXU_power6")
(define_insn_reservation "power6-insert" 1
(and (eq_attr "type" "insert_word")
(eq_attr "cpu" "power6"))

2
gcc/config/rs6000/power7.md
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@ -150,7 +150,7 @@
; FX Unit
(define_insn_reservation "power7-integer" 1
(and (eq_attr "type" "integer,insert_word,insert_dword,shift,trap,\
var_shift_rotate,exts,isel")
var_shift_rotate,exts,isel,popcnt")
(eq_attr "cpu" "power7"))
"DU_power7,FXU_power7")

10
gcc/config/rs6000/rs6000.md
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@ -145,7 +145,7 @@
;; Define an insn type attribute. This is used in function unit delay
;; computations.
(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel"
(define_attr "type" "integer,two,three,load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,store,store_ux,store_u,fpload,fpload_ux,fpload_u,fpstore,fpstore_ux,fpstore_u,vecload,vecstore,imul,imul2,imul3,lmul,idiv,ldiv,insert_word,branch,cmp,fast_compare,compare,var_delayed_compare,delayed_compare,imul_compare,lmul_compare,fpcompare,cr_logical,delayed_cr,mfcr,mfcrf,mtcr,mfjmpr,mtjmpr,fp,fpsimple,dmul,sdiv,ddiv,ssqrt,dsqrt,jmpreg,brinc,vecsimple,veccomplex,vecdiv,veccmp,veccmpsimple,vecperm,vecfloat,vecfdiv,vecdouble,isync,sync,load_l,store_c,shift,trap,insert_dword,var_shift_rotate,cntlz,exts,mffgpr,mftgpr,isel,popcnt"
(const_string "integer"))
;; Define floating point instruction sub-types for use with Xfpu.md
@ -2332,13 +2332,17 @@
(unspec:GPR [(match_operand:GPR 1 "gpc_reg_operand" "r")]
UNSPEC_POPCNTB))]
"TARGET_POPCNTB"
"popcntb %0,%1")
"popcntb %0,%1"
[(set_attr "length" "4")
(set_attr "type" "popcnt")])
(define_insn "popcntd<mode>2"
[(set (match_operand:GPR 0 "gpc_reg_operand" "=r")
(popcount:GPR (match_operand:GPR 1 "gpc_reg_operand" "r")))]
"TARGET_POPCNTD"
"popcnt<wd> %0,%1")
"popcnt<wd> %0,%1"
[(set_attr "length" "4")
(set_attr "type" "popcnt")])
(define_expand "popcount<mode>2"
[(set (match_operand:GPR 0 "gpc_reg_operand" "")