mirror of git://gcc.gnu.org/git/gcc.git
Properly convert GTU to GT for V4SI and V2DI
gcc/ 2010-01-05 Paolo Bonzini <bonzinI@gnu.rg> H.J. Lu <hongjiu.lu@intel.com> PR target/42542 * config/i386/i386.c (ix86_expand_int_vcond): Convert GTU to GT for V4SI and V2DI by subtracting (-(INT MAX) - 1) from both operands to make them signed. * config/i386/sse.md (umaxv4si3): Revert the last change. (umin<mode>3): Likewise. (uminv8hi3): Removed. (uminv4si3): Likewise. gcc/testsuite/ 2010-01-05 H.J. Lu <hongjiu.lu@intel.com> * gcc.target/i386/pr42542-1.c (res): Make it 8 elements. From-SVN: r155660
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2010-01-05 Paolo Bonzini <bonzinI@gnu.rg>
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H.J. Lu <hongjiu.lu@intel.com>
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PR target/42542
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* config/i386/i386.c (ix86_expand_int_vcond): Convert GTU to GT
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for V4SI and V2DI by subtracting (-(INT MAX) - 1) from both
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operands to make them signed.
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* config/i386/sse.md (umaxv4si3): Revert the last change.
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(umin<mode>3): Likewise.
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(uminv8hi3): Removed.
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(uminv4si3): Likewise.
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2010-01-05 Martin Jambor <mjambor@suse.cz>
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PR tree-optimization/42462
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@ -16252,6 +16252,30 @@ ix86_expand_int_vcond (rtx operands[])
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switch (mode)
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{
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case V4SImode:
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case V2DImode:
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{
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rtx t1, t2, mask;
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rtx (*gen_sub3) (rtx, rtx, rtx);
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/* Subtract (-(INT MAX) - 1) from both operands to make
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them signed. */
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mask = ix86_build_signbit_mask (GET_MODE_INNER (mode),
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true, false);
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gen_sub3 = (mode == V4SImode
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? gen_subv4si3 : gen_subv2di3);
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t1 = gen_reg_rtx (mode);
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emit_insn (gen_sub3 (t1, cop0, mask));
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t2 = gen_reg_rtx (mode);
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emit_insn (gen_sub3 (t2, cop1, mask));
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cop0 = t1;
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cop1 = t2;
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code = GT;
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}
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break;
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case V16QImode:
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case V8HImode:
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/* Perform a parallel unsigned saturating subtraction. */
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@ -16259,6 +16283,8 @@ ix86_expand_int_vcond (rtx operands[])
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emit_insn (gen_rtx_SET (VOIDmode, x,
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gen_rtx_US_MINUS (mode, cop0, cop1)));
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cop0 = x;
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cop1 = CONST0_RTX (mode);
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code = EQ;
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negate = !negate;
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break;
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@ -16266,9 +16292,6 @@ ix86_expand_int_vcond (rtx operands[])
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default:
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gcc_unreachable ();
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}
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cop0 = x;
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cop1 = CONST0_RTX (mode);
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}
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}
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@ -6138,7 +6138,7 @@
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[(set (match_operand:V4SI 0 "register_operand" "")
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(umax:V4SI (match_operand:V4SI 1 "register_operand" "")
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(match_operand:V4SI 2 "register_operand" "")))]
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"TARGET_SSE4_1 || TARGET_XOP"
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"TARGET_SSE2"
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{
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if (TARGET_SSE4_1)
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ix86_fixup_binary_operands_no_copy (UMAX, V4SImode, operands);
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@ -6195,39 +6195,14 @@
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}
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})
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(define_expand "uminv8hi3"
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[(set (match_operand:V8HI 0 "register_operand" "")
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(umin:V8HI (match_operand:V8HI 1 "register_operand" "")
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(match_operand:V8HI 2 "register_operand" "")))]
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(define_expand "umin<mode>3"
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[(set (match_operand:SSEMODE24 0 "register_operand" "")
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(umin:SSEMODE24 (match_operand:SSEMODE24 1 "register_operand" "")
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(match_operand:SSEMODE24 2 "register_operand" "")))]
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"TARGET_SSE2"
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{
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if (TARGET_SSE4_1)
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ix86_fixup_binary_operands_no_copy (UMIN, V8HImode, operands);
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else
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{
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rtx xops[6];
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bool ok;
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xops[0] = operands[0];
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xops[1] = operands[2];
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xops[2] = operands[1];
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xops[3] = gen_rtx_GTU (VOIDmode, operands[1], operands[2]);
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xops[4] = operands[1];
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xops[5] = operands[2];
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ok = ix86_expand_int_vcond (xops);
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gcc_assert (ok);
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DONE;
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}
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})
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(define_expand "uminv4si3"
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[(set (match_operand:V4SI 0 "register_operand" "")
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(umin:V4SI (match_operand:V4SI 1 "register_operand" "")
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(match_operand:V4SI 2 "register_operand" "")))]
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"TARGET_SSE4_1 || TARGET_XOP"
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{
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if (TARGET_SSE4_1)
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ix86_fixup_binary_operands_no_copy (UMIN, V4SImode, operands);
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ix86_fixup_binary_operands_no_copy (UMIN, <MODE>mode, operands);
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else
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{
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rtx xops[6];
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@ -1,3 +1,7 @@
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2010-01-05 H.J. Lu <hongjiu.lu@intel.com>
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* gcc.target/i386/pr42542-1.c (res): Make it 8 elements.
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2010-01-05 Martin Jambor <mjambor@suse.cz>
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PR tree-optimization/42462
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@ -34,7 +34,7 @@ unsigned int min[] =
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3, 6, 7, 8
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};
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unsigned int res[16] __attribute__ ((aligned(16)));
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unsigned int res[8] __attribute__ ((aligned(16)));
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extern void abort (void);
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