Properly convert GTU to GT for V4SI and V2DI

gcc/

2010-01-05  Paolo Bonzini  <bonzinI@gnu.rg>
	    H.J. Lu  <hongjiu.lu@intel.com>

	PR target/42542
	* config/i386/i386.c (ix86_expand_int_vcond): Convert GTU to GT
	for V4SI and V2DI by subtracting (-(INT MAX) - 1) from both
	operands to make them signed.

	* config/i386/sse.md (umaxv4si3): Revert the last change.
	(umin<mode>3): Likewise.
	(uminv8hi3): Removed.
	(uminv4si3): Likewise.

gcc/testsuite/

2010-01-05  H.J. Lu  <hongjiu.lu@intel.com>

	* gcc.target/i386/pr42542-1.c (res): Make it 8 elements.

From-SVN: r155660
This commit is contained in:
H.J. Lu 2010-01-05 12:44:14 -08:00
parent ac2bb43770
commit 43d4b97de4
5 changed files with 50 additions and 35 deletions

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@ -1,3 +1,16 @@
2010-01-05 Paolo Bonzini <bonzinI@gnu.rg>
H.J. Lu <hongjiu.lu@intel.com>
PR target/42542
* config/i386/i386.c (ix86_expand_int_vcond): Convert GTU to GT
for V4SI and V2DI by subtracting (-(INT MAX) - 1) from both
operands to make them signed.
* config/i386/sse.md (umaxv4si3): Revert the last change.
(umin<mode>3): Likewise.
(uminv8hi3): Removed.
(uminv4si3): Likewise.
2010-01-05 Martin Jambor <mjambor@suse.cz> 2010-01-05 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/42462 PR tree-optimization/42462

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@ -16252,6 +16252,30 @@ ix86_expand_int_vcond (rtx operands[])
switch (mode) switch (mode)
{ {
case V4SImode:
case V2DImode:
{
rtx t1, t2, mask;
rtx (*gen_sub3) (rtx, rtx, rtx);
/* Subtract (-(INT MAX) - 1) from both operands to make
them signed. */
mask = ix86_build_signbit_mask (GET_MODE_INNER (mode),
true, false);
gen_sub3 = (mode == V4SImode
? gen_subv4si3 : gen_subv2di3);
t1 = gen_reg_rtx (mode);
emit_insn (gen_sub3 (t1, cop0, mask));
t2 = gen_reg_rtx (mode);
emit_insn (gen_sub3 (t2, cop1, mask));
cop0 = t1;
cop1 = t2;
code = GT;
}
break;
case V16QImode: case V16QImode:
case V8HImode: case V8HImode:
/* Perform a parallel unsigned saturating subtraction. */ /* Perform a parallel unsigned saturating subtraction. */
@ -16259,6 +16283,8 @@ ix86_expand_int_vcond (rtx operands[])
emit_insn (gen_rtx_SET (VOIDmode, x, emit_insn (gen_rtx_SET (VOIDmode, x,
gen_rtx_US_MINUS (mode, cop0, cop1))); gen_rtx_US_MINUS (mode, cop0, cop1)));
cop0 = x;
cop1 = CONST0_RTX (mode);
code = EQ; code = EQ;
negate = !negate; negate = !negate;
break; break;
@ -16266,9 +16292,6 @@ ix86_expand_int_vcond (rtx operands[])
default: default:
gcc_unreachable (); gcc_unreachable ();
} }
cop0 = x;
cop1 = CONST0_RTX (mode);
} }
} }

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@ -6138,7 +6138,7 @@
[(set (match_operand:V4SI 0 "register_operand" "") [(set (match_operand:V4SI 0 "register_operand" "")
(umax:V4SI (match_operand:V4SI 1 "register_operand" "") (umax:V4SI (match_operand:V4SI 1 "register_operand" "")
(match_operand:V4SI 2 "register_operand" "")))] (match_operand:V4SI 2 "register_operand" "")))]
"TARGET_SSE4_1 || TARGET_XOP" "TARGET_SSE2"
{ {
if (TARGET_SSE4_1) if (TARGET_SSE4_1)
ix86_fixup_binary_operands_no_copy (UMAX, V4SImode, operands); ix86_fixup_binary_operands_no_copy (UMAX, V4SImode, operands);
@ -6195,39 +6195,14 @@
} }
}) })
(define_expand "uminv8hi3" (define_expand "umin<mode>3"
[(set (match_operand:V8HI 0 "register_operand" "") [(set (match_operand:SSEMODE24 0 "register_operand" "")
(umin:V8HI (match_operand:V8HI 1 "register_operand" "") (umin:SSEMODE24 (match_operand:SSEMODE24 1 "register_operand" "")
(match_operand:V8HI 2 "register_operand" "")))] (match_operand:SSEMODE24 2 "register_operand" "")))]
"TARGET_SSE2" "TARGET_SSE2"
{ {
if (TARGET_SSE4_1) if (TARGET_SSE4_1)
ix86_fixup_binary_operands_no_copy (UMIN, V8HImode, operands); ix86_fixup_binary_operands_no_copy (UMIN, <MODE>mode, operands);
else
{
rtx xops[6];
bool ok;
xops[0] = operands[0];
xops[1] = operands[2];
xops[2] = operands[1];
xops[3] = gen_rtx_GTU (VOIDmode, operands[1], operands[2]);
xops[4] = operands[1];
xops[5] = operands[2];
ok = ix86_expand_int_vcond (xops);
gcc_assert (ok);
DONE;
}
})
(define_expand "uminv4si3"
[(set (match_operand:V4SI 0 "register_operand" "")
(umin:V4SI (match_operand:V4SI 1 "register_operand" "")
(match_operand:V4SI 2 "register_operand" "")))]
"TARGET_SSE4_1 || TARGET_XOP"
{
if (TARGET_SSE4_1)
ix86_fixup_binary_operands_no_copy (UMIN, V4SImode, operands);
else else
{ {
rtx xops[6]; rtx xops[6];

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@ -1,3 +1,7 @@
2010-01-05 H.J. Lu <hongjiu.lu@intel.com>
* gcc.target/i386/pr42542-1.c (res): Make it 8 elements.
2010-01-05 Martin Jambor <mjambor@suse.cz> 2010-01-05 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/42462 PR tree-optimization/42462

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@ -34,7 +34,7 @@ unsigned int min[] =
3, 6, 7, 8 3, 6, 7, 8
}; };
unsigned int res[16] __attribute__ ((aligned(16))); unsigned int res[8] __attribute__ ((aligned(16)));
extern void abort (void); extern void abort (void);