diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8a83f4e376cc..080825432a64 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2019-01-11 Jan Beulich + + * config/i386/i386.md (rex64suffix): Add L suffix for SI. + * config/i386/sse.md (cvtusi232, + sse2_cvtsi2sd): Add {l}. + (sse2_cvtsi2sdq): Make q conditional upon AT&T + syntax. + 2019-01-10 Jakub Jelinek PR target/88785 diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 28e336044683..d085e88bc61d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1163,7 +1163,7 @@ [(QI "V64QI") (HI "V32HI") (SI "V16SI") (DI "V8DI") (SF "V16SF") (DF "V8DF")]) ;; Instruction suffix for REX 64bit operators. -(define_mode_attr rex64suffix [(SI "") (DI "{q}")]) +(define_mode_attr rex64suffix [(SI "{l}") (DI "{q}")]) (define_mode_attr rex64namesuffix [(SI "") (DI "q")]) ;; This mode iterator allows :P to be used for patterns that operate on diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index c9ec74b6aa10..15643fe6b11d 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4781,7 +4781,7 @@ (match_operand:VF_128 1 "register_operand" "v") (const_int 1)))] "TARGET_AVX512F && " - "vcvtusi2\t{%2, %1, %0|%0, %1, %2}" + "vcvtusi2{l}\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseicvt") (set_attr "prefix" "evex") (set_attr "mode" "")]) @@ -5040,9 +5040,9 @@ (const_int 1)))] "TARGET_SSE2" "@ - cvtsi2sd\t{%2, %0|%0, %2} - cvtsi2sd\t{%2, %0|%0, %2} - vcvtsi2sd\t{%2, %1, %0|%0, %1, %2}" + cvtsi2sd{l}\t{%2, %0|%0, %2} + cvtsi2sd{l}\t{%2, %0|%0, %2} + vcvtsi2sd{l}\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "sseicvt") (set_attr "athlon_decode" "double,direct,*") @@ -5062,9 +5062,9 @@ (const_int 1)))] "TARGET_SSE2 && TARGET_64BIT" "@ - cvtsi2sdq\t{%2, %0|%0, %2} - cvtsi2sdq\t{%2, %0|%0, %2} - vcvtsi2sdq\t{%2, %1, %0|%0, %1, %2}" + cvtsi2sd{q}\t{%2, %0|%0, %2} + cvtsi2sd{q}\t{%2, %0|%0, %2} + vcvtsi2sd{q}\t{%2, %1, %0|%0, %1, %2}" [(set_attr "isa" "noavx,noavx,avx") (set_attr "type" "sseicvt") (set_attr "athlon_decode" "double,direct,*") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index beccccd20d80..5fbeb1e5f5b3 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,18 @@ +2019-01-11 Jan Beulich + + * gcc.target/i386/avx512f-vcvtsd2si-1.c, + gcc.target/i386/avx512f-vcvtss2si-1.c, + gcc.target/i386/avx512f-vcvttsd2si-1.c, + gcc.target/i386/avx512f-vcvttss2si-1.c: Permit l suffix. + * gcc.target/i386/avx512f-vcvtsi2ss-1.c, + gcc.target/i386/avx512f-vcvtusi2sd-1.c, + gcc.target/i386/avx512f-vcvtusi2ss-1.c: Expect l suffix. + * gcc.target/i386/avx512f-vcvtusi2sd-2.c, + gcc.target/i386/avx512f-vcvtusi2sd64-2.c, + gcc.target/i386/avx512f-vcvtusi2ss-2.c, + gcc.target/i386/avx512f-vcvtusi2ss64-2.c: Add asm volatile(). + gcc.target/i386/pr19398.c: Permit l or q suffix. + 2019-01-11 Jakub Jelinek PR rtl-optimization/88296 diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c index 893c85aceb65..845e206e025f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsd2si-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f" } */ -/* { dg-final { scan-assembler-times "vcvtsd2si\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsd2sil?\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ #include volatile __m128d x; diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c index 179ab64a7269..8e26576ee7fe 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtsi2ss-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vcvtsi2ss\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtsi2ssl\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c index d093814b0fb8..96289ef95c5f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtss2si-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f" } */ -/* { dg-final { scan-assembler-times "vcvtss2si\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtss2sil?\[ \\t\]+\[^\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ #include volatile __m128 x; diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-1.c index e9b1d9b6c094..e7f23aa7e50a 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttsd2si-1.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f" } */ -/* { dg-final { scan-assembler-times "vcvttsd2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttsd2si\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttsd2sil?\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttsd2sil?\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ #include volatile __m128d x; diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-1.c index 7351d33b1426..859848201a40 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvttss2si-1.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-O2 -mavx512f" } */ -/* { dg-final { scan-assembler-times "vcvttss2si\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvttss2si\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttss2sil?\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvttss2sil?\[ \\t\]+\[^\{\n\]*\{sae\}\[^\n\]*%xmm\[0-9\]+.{6}(?:\n|\[ \\t\]+#)" 1 } } */ #include volatile __m128 x; diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-1.c index 215ed3df2b2f..16fd394af561 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-1.c @@ -1,6 +1,6 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vcvtusi2sd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtusi2sdl\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-2.c index 2100cbeb4238..89e5f5428321 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd-2.c @@ -22,7 +22,9 @@ avx512f_test (void) s1.x = _mm_set_pd (-24.43, -43.35); s2 = 0xFEDCA987; + asm volatile ("" : "+m" (s2)); res.x = _mm_cvtu32_sd (s1.x, s2); + asm volatile ("" : "+m" (s2)); compute_vcvtusi2sd (s1.a, s2, res_ref); diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-2.c index d7dc0f9940cf..c2736b7b3ff5 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2sd64-2.c @@ -22,7 +22,9 @@ avx512f_test (void) s1.x = _mm_set_pd (-24.43, -43.35); s2 = 0xFEDCBA9876543210; + asm volatile ("" : "+m" (s2)); res.x = _mm_cvtu64_sd (s1.x, s2); + asm volatile ("" : "+m" (s2)); compute_vcvtusi2sd (s1.a, s2, res_ref); diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-1.c index cbd5d3f0d5e0..829d2ab9688f 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-1.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-mavx512f -O2" } */ -/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ -/* { dg-final { scan-assembler-times "vcvtusi2ss\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtusi2ssl\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vcvtusi2ssl\[ \\t\]+\[^%\n\]*%e\[^\{\n\]*\{rn-sae\}\[^\{\n\]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ #include diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-2.c index b5f67dd0ba0c..6d2827d0fdd2 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss-2.c @@ -24,7 +24,9 @@ avx512f_test (void) s1.x = _mm_set_ps (-24.43, 68.346, -43.35, 546.46); s2 = 0xFEDCA987; + asm volatile ("" : "+m" (s2)); res.x = _mm_cvtu32_ss (s1.x, s2); + asm volatile ("" : "+m" (s2)); compute_vcvtusi2ss (s1.a, s2, res_ref); diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-2.c index e3b015c2e332..1023e5007359 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-2.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vcvtusi2ss64-2.c @@ -24,7 +24,9 @@ avx512f_test (void) s1.x = _mm_set_ps (-24.43, 68.346, -43.35, 546.46); s2 = 0xFEDCBA9876543210; + asm volatile ("" : "+m" (s2)); res.x = _mm_cvtu64_ss (s1.x, s2); + asm volatile ("" : "+m" (s2)); compute_vcvtusi2ss (s1.a, s2, res_ref); diff --git a/gcc/testsuite/gcc.target/i386/pr19398.c b/gcc/testsuite/gcc.target/i386/pr19398.c index 60931c0a0a4c..c494179e300b 100644 --- a/gcc/testsuite/gcc.target/i386/pr19398.c +++ b/gcc/testsuite/gcc.target/i386/pr19398.c @@ -6,4 +6,4 @@ int test (float a) return (a * a); } -/* { dg-final { scan-assembler-not "cvttss2si\[^\\n\]*%xmm" } } */ +/* { dg-final { scan-assembler-not "cvttss2si\[lq\]?\[^\\n\]*%xmm" } } */