mirror of git://gcc.gnu.org/git/gcc.git
re PR target/65103 ([i386] GOTOFF relocation is not propagated into address expression)
gcc/ PR target/65103 * config/i386/i386.c (ix86_address_cost): Fix cost of a PIC register. gcc/testsuite/ PR target/65103 * gcc.target/i386/pr65103-1.c: New. From-SVN: r221380
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2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
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PR target/65103
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* config/i386/i386.c (ix86_address_cost): Fix cost of a PIC
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register.
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2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
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2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
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PR target/65044
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PR target/65044
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@ -12931,30 +12931,26 @@ ix86_address_cost (rtx x, machine_mode, addr_space_t, bool)
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if (parts.index && GET_CODE (parts.index) == SUBREG)
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if (parts.index && GET_CODE (parts.index) == SUBREG)
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parts.index = SUBREG_REG (parts.index);
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parts.index = SUBREG_REG (parts.index);
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/* Attempt to minimize number of registers in the address. */
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/* Attempt to minimize number of registers in the address by increasing
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if ((parts.base
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address cost for each used register. We don't increase address cost
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&& (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER))
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for "pic_offset_table_rtx". When a memopt with "pic_offset_table_rtx"
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|| (parts.index
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is not invariant itself it most likely means that base or index is not
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&& (!REG_P (parts.index)
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invariant. Therefore only "pic_offset_table_rtx" could be hoisted out,
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|| REGNO (parts.index) >= FIRST_PSEUDO_REGISTER)))
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which is not profitable for x86. */
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if (parts.base
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&& (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER)
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&& (current_pass->type == GIMPLE_PASS
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|| !pic_offset_table_rtx
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|| !REG_P (parts.base)
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|| REGNO (pic_offset_table_rtx) != REGNO (parts.base)))
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cost++;
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cost++;
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/* When address base or index is "pic_offset_table_rtx" we don't increase
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if (parts.index
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address cost. When a memopt with "pic_offset_table_rtx" is not invariant
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itself it most likely means that base or index is not invariant.
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Therefore only "pic_offset_table_rtx" could be hoisted out, which is not
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profitable for x86. */
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if (parts.base
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&& (current_pass->type == GIMPLE_PASS
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|| (!pic_offset_table_rtx
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|| REGNO (pic_offset_table_rtx) != REGNO(parts.base)))
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&& (!REG_P (parts.base) || REGNO (parts.base) >= FIRST_PSEUDO_REGISTER)
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&& parts.index
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&& (current_pass->type == GIMPLE_PASS
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|| (!pic_offset_table_rtx
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|| REGNO (pic_offset_table_rtx) != REGNO(parts.index)))
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&& (!REG_P (parts.index) || REGNO (parts.index) >= FIRST_PSEUDO_REGISTER)
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&& (!REG_P (parts.index) || REGNO (parts.index) >= FIRST_PSEUDO_REGISTER)
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&& parts.base != parts.index)
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&& (current_pass->type == GIMPLE_PASS
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|| !pic_offset_table_rtx
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|| !REG_P (parts.index)
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|| REGNO (pic_offset_table_rtx) != REGNO (parts.index)))
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cost++;
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cost++;
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/* AMD-K6 don't like addresses with ModR/M set to 00_xxx_100b,
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/* AMD-K6 don't like addresses with ModR/M set to 00_xxx_100b,
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@ -1,3 +1,8 @@
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2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
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PR target/65103
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* gcc.target/i386/pr65103-1.c: New.
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2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
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2015-03-12 Ilya Enkovich <ilya.enkovich@intel.com>
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PR target/65044
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PR target/65044
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@ -0,0 +1,19 @@
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/* { dg-do compile { target ia32 } } */
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/* { dg-require-effective-target pie } */
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/* { dg-options "-O2 -fPIE" } */
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/* { dg-final { scan-assembler-not "GOTOFF," } } */
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typedef struct S
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{
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int a;
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int sum;
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int delta;
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} S;
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S gs;
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int global_opt (int max)
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{
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while (gs.sum < max)
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gs.sum += gs.delta;
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return gs.a;
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}
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