mirror of git://gcc.gnu.org/git/gcc.git
Bob Wilson
Bob Wilson
parent
5675294bcb
commit
638db43e75
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@ -1,3 +1,7 @@
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2003-05-09 Bob Wilson <bob.wilson@acm.org>
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* config/xtensa/xtensa.c: Formatting.
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2003-05-09 Diego Novillo <dnovillo@redhat.com>
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* tree-dump.c (dequeue_and_dump): Use CONSTRUCTOR_ELTS,
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@ -52,7 +52,7 @@ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
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/* Enumeration for all of the relational tests, so that we can build
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arrays indexed by the test type, and not worry about the order
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of EQ, NE, etc. */
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of EQ, NE, etc. */
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enum internal_test {
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ITEST_EQ,
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@ -96,7 +96,7 @@ struct machine_function GTY(())
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/* Vector, indexed by hard register number, which contains 1 for a
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register that is allowable in a candidate for leaf function
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treatment. */
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treatment. */
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const char xtensa_leaf_regs[FIRST_PSEUDO_REGISTER] =
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{
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@ -376,7 +376,7 @@ xtensa_uimm8x4 (v)
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/* This is just like the standard true_regnum() function except that it
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works even when reg_renumber is not initialized. */
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works even when reg_renumber is not initialized. */
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int
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xt_true_regnum (x)
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@ -404,56 +404,56 @@ xt_true_regnum (x)
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int
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add_operand (op, mode)
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rtx op;
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enum machine_mode mode;
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rtx op;
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enum machine_mode mode;
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{
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if (GET_CODE (op) == CONST_INT)
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return (xtensa_simm8 (INTVAL (op)) ||
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xtensa_simm8x256 (INTVAL (op)));
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if (GET_CODE (op) == CONST_INT)
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return (xtensa_simm8 (INTVAL (op)) ||
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xtensa_simm8x256 (INTVAL (op)));
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return register_operand (op, mode);
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return register_operand (op, mode);
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}
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int
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arith_operand (op, mode)
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rtx op;
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enum machine_mode mode;
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rtx op;
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enum machine_mode mode;
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{
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if (GET_CODE (op) == CONST_INT)
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return xtensa_simm8 (INTVAL (op));
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if (GET_CODE (op) == CONST_INT)
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return xtensa_simm8 (INTVAL (op));
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return register_operand (op, mode);
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return register_operand (op, mode);
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}
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int
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nonimmed_operand (op, mode)
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rtx op;
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enum machine_mode mode;
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rtx op;
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enum machine_mode mode;
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{
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/* We cannot use the standard nonimmediate_operand() predicate because
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it includes constant pool memory operands. */
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/* We cannot use the standard nonimmediate_operand() predicate because
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it includes constant pool memory operands. */
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if (memory_operand (op, mode))
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return !constantpool_address_p (XEXP (op, 0));
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if (memory_operand (op, mode))
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return !constantpool_address_p (XEXP (op, 0));
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return register_operand (op, mode);
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return register_operand (op, mode);
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}
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int
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mem_operand (op, mode)
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rtx op;
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enum machine_mode mode;
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rtx op;
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enum machine_mode mode;
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{
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/* We cannot use the standard memory_operand() predicate because
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it includes constant pool memory operands. */
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/* We cannot use the standard memory_operand() predicate because
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it includes constant pool memory operands. */
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if (memory_operand (op, mode))
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return !constantpool_address_p (XEXP (op, 0));
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if (memory_operand (op, mode))
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return !constantpool_address_p (XEXP (op, 0));
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return FALSE;
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return FALSE;
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}
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@ -469,7 +469,7 @@ xtensa_valid_move (mode, operands)
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{
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int dst_regnum = xt_true_regnum (operands[0]);
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/* The stack pointer can only be assigned with a MOVSP opcode. */
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/* The stack pointer can only be assigned with a MOVSP opcode. */
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if (dst_regnum == STACK_POINTER_REGNUM)
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return (mode == SImode
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&& register_operand (operands[1], mode)
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@ -610,7 +610,7 @@ move_operand (op, mode)
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return TRUE;
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/* Accept CONSTANT_P_RTX, since it will be gone by CSE1 and
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result in 0/1. */
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result in 0/1. */
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if (GET_CODE (op) == CONSTANT_P_RTX)
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return TRUE;
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@ -894,7 +894,7 @@ xtensa_mem_offset (v, mode)
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where we emit an optimized block move operation if the block can be
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moved in < "move_ratio" pieces. The worst case is when the block is
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aligned but has a size of (3 mod 4) (does this happen?) so that the
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last piece requires a byte load/store. */
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last piece requires a byte load/store. */
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return (xtensa_uimm8 (v) &&
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xtensa_uimm8 (v + MOVE_MAX * LARGEST_MOVE_RATIO));
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@ -943,7 +943,7 @@ map_test_to_internal_test (test_code)
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/* Generate the code to compare two integer values. The return value is
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the comparison expression. */
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the comparison expression. */
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static rtx
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gen_int_relational (test_code, cmp0, cmp1, p_invert)
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@ -1042,7 +1042,7 @@ gen_int_relational (test_code, cmp0, cmp1, p_invert)
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/* Generate the code to compare two float values. The return value is
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the comparison expression. */
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the comparison expression. */
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static rtx
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gen_float_relational (test_code, cmp0, cmp1)
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@ -1146,7 +1146,7 @@ gen_conditional_move (cmp)
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comparison supported in Xtensa. We shouldn't have to
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transform <LE x const> comparisons, because neither
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xtensa_expand_conditional_branch() nor get_condition() will
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produce them. */
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produce them. */
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if ((code == GT) && (op1 == constm1_rtx))
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{
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@ -1285,8 +1285,8 @@ xtensa_emit_move_sequence (operands, mode)
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}
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/* During reload we don't want to emit (subreg:X (mem:Y)) since that
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instruction won't be recognized after reload. So we remove the
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subreg and adjust mem accordingly. */
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instruction won't be recognized after reload, so we remove the
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subreg and adjust mem accordingly. */
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if (reload_in_progress)
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{
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operands[0] = fixup_subreg_mem (operands[0]);
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@ -1598,7 +1598,7 @@ xtensa_init_machine_status ()
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void
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xtensa_setup_frame_addresses ()
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{
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/* Set flag to cause FRAME_POINTER_REQUIRED to be set. */
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/* Set flag to cause FRAME_POINTER_REQUIRED to be set. */
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cfun->machine->accesses_prev_frame = 1;
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emit_library_call
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@ -1607,18 +1607,18 @@ xtensa_setup_frame_addresses ()
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}
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/* Emit the assembly for the end of a zero-cost loop. Normally we just emit
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a comment showing where the end of the loop is. However, if there is a
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/* Emit the assembly for the end of a zero-cost loop. Normally we just emit
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a comment showing where the end of the loop is. However, if there is a
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label or a branch at the end of the loop then we need to place a nop
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there. If the loop ends with a label we need the nop so that branches
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there. If the loop ends with a label we need the nop so that branches
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targetting that label will target the nop (and thus remain in the loop),
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instead of targetting the instruction after the loop (and thus exiting
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the loop). If the loop ends with a branch, we need the nop in case the
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branch is targetting a location inside the loop. When the branch
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the loop). If the loop ends with a branch, we need the nop in case the
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branch is targetting a location inside the loop. When the branch
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executes it will cause the loop count to be decremented even if it is
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taken (because it is the last instruction in the loop), so we need to
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nop after the branch to prevent the loop count from being decremented
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when the branch is taken. */
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when the branch is taken. */
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void
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xtensa_emit_loop_end (insn, operands)
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@ -1680,7 +1680,7 @@ xtensa_emit_call (callop, operands)
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}
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/* Return the stabs register number to use for 'regno'. */
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/* Return the stabs register number to use for 'regno'. */
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int
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xtensa_dbx_register_number (regno)
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@ -1702,7 +1702,7 @@ xtensa_dbx_register_number (regno)
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numbered in libcc order beginning with 256. We can't guarantee
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that the FP registers will come first, so the following is just
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a guess. It seems like we should make a special case for FP
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registers and give them fixed numbers < 256. */
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registers and give them fixed numbers < 256. */
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first = 256;
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}
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else if (ACC_REG_P (regno))
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@ -1712,7 +1712,7 @@ xtensa_dbx_register_number (regno)
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}
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/* When optimizing, we sometimes get asked about pseudo-registers
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that don't represent hard registers. Return 0 for these. */
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that don't represent hard registers. Return 0 for these. */
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if (first == -1)
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return 0;
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@ -1794,7 +1794,7 @@ function_arg (cum, mode, type, incoming_p)
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rtx that is not equal to hard_frame_pointer_rtx. For BLKmode and
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modes bigger than 2 words (because we only have patterns for
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modes of 2 words or smaller), we can't control the expansion
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unless we explicitly list the individual registers in a PARALLEL. */
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unless we explicitly list the individual registers in a PARALLEL. */
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if ((mode == BLKmode || words > 2)
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&& regno < A7_REG
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@ -1845,7 +1845,7 @@ override_options ()
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xtensa_char_to_class['D'] = ((TARGET_DENSITY) ? GR_REGS: NO_REGS);
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xtensa_char_to_class['d'] = ((TARGET_DENSITY) ? AR_REGS: NO_REGS);
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/* Set up array giving whether a given register can hold a given mode. */
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/* Set up array giving whether a given register can hold a given mode. */
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for (mode = VOIDmode;
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mode != MAX_MACHINE_MODE;
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mode = (enum machine_mode) ((int) mode + 1))
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@ -2151,7 +2151,7 @@ xtensa_output_literal (file, x, mode, labelno)
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/* Return the bytes needed to compute the frame pointer from the current
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stack pointer. */
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stack pointer. */
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#define STACK_BYTES (STACK_BOUNDARY / BITS_PER_UNIT)
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#define XTENSA_STACK_ALIGN(LOC) (((LOC) + STACK_BYTES-1) & ~(STACK_BYTES-1))
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@ -2178,7 +2178,7 @@ xtensa_frame_pointer_required ()
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/* The code to expand builtin_frame_addr and builtin_return_addr
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currently uses the hard_frame_pointer instead of frame_pointer.
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This seems wrong but maybe it's necessary for other architectures.
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This function is derived from the i386 code. */
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This function is derived from the i386 code. */
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if (cfun->machine->accesses_prev_frame)
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return 1;
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@ -2212,7 +2212,7 @@ xtensa_reorg (first)
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frame pointer. This search will fail if the function does not
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have an incoming argument in $a7, but in that case, we can just
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set up the frame pointer at the very beginning of the
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function. */
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function. */
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for (insn = first; insn; insn = NEXT_INSN (insn))
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{
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@ -2286,7 +2286,7 @@ xtensa_function_prologue (file, size)
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/* Do any necessary cleanup after a function to restore
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stack, frame, and regs. */
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stack, frame, and regs. */
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void
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xtensa_function_epilogue (file, size)
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@ -2294,7 +2294,7 @@ xtensa_function_epilogue (file, size)
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HOST_WIDE_INT size ATTRIBUTE_UNUSED;
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{
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rtx insn = get_last_insn ();
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/* If the last insn was a BARRIER, we don't have to write anything. */
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/* If the last insn was a BARRIER, we don't have to write anything. */
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if (GET_CODE (insn) == NOTE)
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insn = prev_nonnote_insn (insn);
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if (insn == 0 || GET_CODE (insn) != BARRIER)
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@ -2342,7 +2342,7 @@ xtensa_return_addr (count, frame)
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registers. E.G., if there are 6 argument registers, and each register is
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4 bytes, then __va_stk is set to $sp - (6 * 4); then __va_reg[N*4]
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references argument word N for 0 <= N < 6, and __va_stk[N*4] references
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argument word N for N >= 6. */
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argument word N for N >= 6. */
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tree
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xtensa_build_va_list ()
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@ -2375,7 +2375,7 @@ xtensa_build_va_list ()
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/* Save the incoming argument registers on the stack. Returns the
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address of the saved registers. */
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address of the saved registers. */
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rtx
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xtensa_builtin_saveregs ()
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@ -2401,7 +2401,7 @@ xtensa_builtin_saveregs ()
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/* Note: Don't use move_block_from_reg() here because the incoming
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argument in a7 cannot be represented by hard_frame_pointer_rtx.
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Instead, call gen_raw_REG() directly so that we get a distinct
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instance of (REG:SI 7). */
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instance of (REG:SI 7). */
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for (i = 0; i < gp_left; i++)
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{
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emit_move_insn (operand_subword (dest, i, 1, BLKmode),
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@ -2413,7 +2413,7 @@ xtensa_builtin_saveregs ()
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/* Implement `va_start' for varargs and stdarg. We look at the
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current function to fill in an initial va_list. */
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current function to fill in an initial va_list. */
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void
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xtensa_va_start (valist, nextarg)
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@ -2451,7 +2451,7 @@ xtensa_va_start (valist, nextarg)
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TREE_SIDE_EFFECTS (t) = 1;
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expand_expr (t, const0_rtx, VOIDmode, EXPAND_NORMAL);
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/* Set the __va_ndx member. */
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/* Set the __va_ndx member. */
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u = build_int_2 (arg_words * UNITS_PER_WORD, 0);
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t = build (MODIFY_EXPR, integer_type_node, ndx, u);
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TREE_SIDE_EFFECTS (t) = 1;
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@ -2715,7 +2715,7 @@ order_regs_for_local_alloc ()
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for (i = 0; i < 16; i++)
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reg_alloc_order[nxt++] = FP_REG_FIRST + i;
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/* GCC requires that we list *all* the registers.... */
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/* GCC requires that we list *all* the registers.... */
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reg_alloc_order[nxt++] = 0; /* a0 = return address */
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reg_alloc_order[nxt++] = 1; /* a1 = stack pointer */
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reg_alloc_order[nxt++] = 16; /* pseudo frame pointer */
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@ -2727,7 +2727,7 @@ order_regs_for_local_alloc ()
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/* A customized version of reg_overlap_mentioned_p that only looks for
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references to a7 (as opposed to hard_frame_pointer_rtx). */
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references to a7 (as opposed to hard_frame_pointer_rtx). */
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int
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a7_overlap_mentioned_p (x)
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Loading…
Reference in New Issue