diff --git a/gcc/config/bpf/bpf.cc b/gcc/config/bpf/bpf.cc
index e9b3fe9d71fc..2e7474be1ff3 100644
--- a/gcc/config/bpf/bpf.cc
+++ b/gcc/config/bpf/bpf.cc
@@ -444,7 +444,7 @@ bpf_expand_cbranch (machine_mode mode, rtx *operands)
   if ((code == LT || code == LE || code == LTU || code == LEU))
     {
       /* Reverse the condition.  */
-      PUT_CODE (operands[0], reverse_condition (code));
+      PUT_CODE (operands[0], swap_condition (code));
 
       /* Swap the operands, and ensure that the first is a register.  */
       if (!register_operand (operands[2], mode))
diff --git a/gcc/testsuite/gcc.target/bpf/pr122141-1.c b/gcc/testsuite/gcc.target/bpf/pr122141-1.c
new file mode 100644
index 000000000000..8fd124583795
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bpf/pr122141-1.c
@@ -0,0 +1,11 @@
+/* PR122141 miscompilation when j(s)l[te] unavailable.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=v1 -masm=normal" } */
+
+int
+f(long a, long b)
+{
+  return a > b ? 2 : 3;
+}
+
+/* { dg-final { scan-assembler "jsge\t%r2,%r1" } } */
diff --git a/gcc/testsuite/gcc.target/bpf/pr122141-2.c b/gcc/testsuite/gcc.target/bpf/pr122141-2.c
new file mode 100644
index 000000000000..3ae16e07d4fa
--- /dev/null
+++ b/gcc/testsuite/gcc.target/bpf/pr122141-2.c
@@ -0,0 +1,11 @@
+/* PR122141 miscompilation when j(s)l[te] unavailable.  */
+/* { dg-do compile } */
+/* { dg-options "-O2 -mcpu=v1 -masm=normal" } */
+
+int
+g(unsigned long a, unsigned long b)
+{
+  return a >= b ? 4 : 5;
+}
+
+/* { dg-final { scan-assembler "jgt\t%r2,%r1" } } */