mirror of git://gcc.gnu.org/git/gcc.git
re PR target/54089 ([SH] Refactor shift patterns)
PR target/54089 * config/sh/predicates (p27_rshift_count_operand, not_p27_rshift_count_operand): New predicates. * config/sh/sh.c (sh_ashlsi_clobbers_t_reg_p, sh_lshrsi_clobbers_t_reg_p, sh_dynamicalize_shift_p): Handle special case when shift amount is 31. (gen_ashift): Emit gen_shlr instead of gen_lshrsi3_m. * config/sh/sh.md (ashlsi3_d): Set type to 'dyn_shift' instead of 'arith'. (ashlsi_c): Rename to shll. Adapt calls to gen_ashlsi_c throughout the file. (lshrsi3): Remove clobber from expander. Use shift_count_operand instead of nonmemory_operand predicate for second operand. Add handling of case lshrsi3_n_clobbers_t. (lshrsi3_k): Use p27_rshift_count_operand for second operand. (lshrsi3_d): Make insn_and_split. Split dynamic shift to constant shift sequences if beneficial. (lshrsi3_n): Make insn_and_split. Split constant shift sequence to dynamic shift if beneficial. (lshrsi3_n_clobbers_t): New insn_and_split. (lshrsi3_m): Delete. PR target/54089 * gcc.target/sh/pr54089-2.c: New. From-SVN: r190603
This commit is contained in:
Oleg Endo
parent
131db6b8b2
commit
6e01d52651
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@ -1,3 +1,27 @@
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2012-08-22 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/54089
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* config/sh/predicates (p27_rshift_count_operand,
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not_p27_rshift_count_operand): New predicates.
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* config/sh/sh.c (sh_ashlsi_clobbers_t_reg_p,
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sh_lshrsi_clobbers_t_reg_p, sh_dynamicalize_shift_p): Handle special
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case when shift amount is 31.
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(gen_ashift): Emit gen_shlr instead of gen_lshrsi3_m.
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* config/sh/sh.md (ashlsi3_d): Set type to 'dyn_shift' instead
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of 'arith'.
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(ashlsi_c): Rename to shll. Adapt calls to gen_ashlsi_c throughout
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the file.
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(lshrsi3): Remove clobber from expander. Use shift_count_operand
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instead of nonmemory_operand predicate for second operand. Add
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handling of case lshrsi3_n_clobbers_t.
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(lshrsi3_k): Use p27_rshift_count_operand for second operand.
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(lshrsi3_d): Make insn_and_split. Split dynamic shift to constant
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shift sequences if beneficial.
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(lshrsi3_n): Make insn_and_split. Split constant shift sequence to
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dynamic shift if beneficial.
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(lshrsi3_n_clobbers_t): New insn_and_split.
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(lshrsi3_m): Delete.
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2012-08-22 Steven Bosscher <steven@gcc.gnu.org>
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* tracer.c (mark_bb_seen): Use SBITMAP_SIZE.
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@ -825,6 +825,8 @@
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return arith_reg_operand (op, mode);
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})
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;; Predicates for matching operands that are constant shift
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;; amounts 1, 2, 8, 16.
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(define_predicate "p27_shift_count_operand"
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(and (match_code "const_int")
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(match_test "satisfies_constraint_P27 (op)")))
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@ -833,6 +835,19 @@
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(and (match_code "const_int")
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(match_test "! satisfies_constraint_P27 (op)")))
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;; For right shifts the constant 1 is a special case because the shlr insn
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;; clobbers the T_REG and is handled by the T_REG clobbering version of the
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;; insn, which is also used for non-P27 shift sequences.
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(define_predicate "p27_rshift_count_operand"
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(and (match_code "const_int")
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(match_test "satisfies_constraint_P27 (op)")
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(match_test "! satisfies_constraint_M (op)")))
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(define_predicate "not_p27_rshift_count_operand"
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(and (match_code "const_int")
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(ior (match_test "! satisfies_constraint_P27 (op)")
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(match_test "satisfies_constraint_M (op)"))))
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;; TODO: Add a comment here.
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(define_predicate "shift_operator"
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@ -2840,6 +2840,11 @@ static const struct ashl_lshr_sequence ashl_lshr_seq[32] =
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{ 4, { 16, 8, 2, 2 }, 0 },
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{ 4, { 16, -1, -2, 16 }, ASHL_CLOBBERS_T },
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{ 3, { 16, -2, 16 }, 0 },
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/* For a right shift by 31 a 2 insn shll-movt sequence can be used.
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For a left shift by 31 a 2 insn and-rotl sequences can be used.
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However, the shift-and combiner code needs this entry here to be in
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terms of real shift insns. */
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{ 3, { 16, -1, 16 }, ASHL_CLOBBERS_T }
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};
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@ -2888,7 +2893,14 @@ bool
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sh_ashlsi_clobbers_t_reg_p (rtx shift_amount)
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{
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gcc_assert (CONST_INT_P (shift_amount));
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return (ashl_lshr_seq[INTVAL (shift_amount) & 31].clobbers_t
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const int shift_amount_i = INTVAL (shift_amount) & 31;
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/* Special case for shift count of 31: use and-rotl sequence. */
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if (shift_amount_i == 31)
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return true;
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return (ashl_lshr_seq[shift_amount_i].clobbers_t
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& ASHL_CLOBBERS_T) != 0;
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}
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@ -2896,10 +2908,39 @@ bool
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sh_lshrsi_clobbers_t_reg_p (rtx shift_amount)
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{
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gcc_assert (CONST_INT_P (shift_amount));
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return (ashl_lshr_seq[INTVAL (shift_amount) & 31].clobbers_t
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const int shift_amount_i = INTVAL (shift_amount) & 31;
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/* Special case for shift count of 31: use shll-movt sequence. */
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if (shift_amount_i == 31)
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return true;
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return (ashl_lshr_seq[shift_amount_i].clobbers_t
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& LSHR_CLOBBERS_T) != 0;
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}
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/* Return true if it is potentially beneficial to use a dynamic shift
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instruction (shad / shar) instead of a combination of 1/2/8/16
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shift instructions for the specified shift count.
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If dynamic shifts are not available, always return false. */
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bool
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sh_dynamicalize_shift_p (rtx count)
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{
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gcc_assert (CONST_INT_P (count));
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const int shift_amount_i = INTVAL (count) & 31;
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int insn_count;
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/* For left and right shifts, there are shorter 2 insn sequences for
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shift amounts of 31. */
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if (shift_amount_i == 31)
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insn_count = 2;
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else
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insn_count = ashl_lshr_seq[shift_amount_i].insn_count;
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return TARGET_DYNSHIFT && (insn_count > 1 + SH_DYNAMIC_SHIFT_COST);
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}
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/* Assuming we have a value that has been sign-extended by at least one bit,
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can we use the ext_shift_amounts with the last shift turned to an arithmetic shift
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to shift it by N without data loss, and quicker than by other means? */
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@ -3385,7 +3426,7 @@ gen_ashift (int type, int n, rtx reg)
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break;
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case LSHIFTRT:
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if (n == 1)
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emit_insn (gen_lshrsi3_m (reg, reg, n_rtx));
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emit_insn (gen_shlr (reg, reg));
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else
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emit_insn (gen_lshrsi3_k (reg, reg, n_rtx));
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break;
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@ -3596,19 +3637,6 @@ expand_ashiftrt (rtx *operands)
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return true;
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}
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/* Return true if it is potentially beneficial to use a dynamic shift
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instruction (shad / shar) instead of a combination of 1/2/8/16
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shift instructions for the specified shift count.
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If dynamic shifts are not available, always return false. */
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bool
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sh_dynamicalize_shift_p (rtx count)
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{
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int insn_count;
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gcc_assert (CONST_INT_P (count));
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insn_count = ashl_lshr_seq[INTVAL (count) & 31].insn_count;
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return TARGET_DYNSHIFT && (insn_count > 1 + SH_DYNAMIC_SHIFT_COST);
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}
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/* Try to find a good way to implement the combiner pattern
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[(set (match_operand:SI 0 "register_operand" "r")
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(and:SI (ashift:SI (match_operand:SI 1 "register_operand" "r")
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@ -4058,7 +4058,7 @@ label:
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FAIL;
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}
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[(set_attr "type" "arith")])
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[(set_attr "type" "dyn_shift")])
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(define_insn_and_split "ashlsi3_n"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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@ -4116,7 +4116,7 @@ label:
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DONE;
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})
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(define_insn "ashlsi_c"
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(define_insn "shll"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(ashift:SI (match_operand:SI 1 "arith_reg_operand" "0") (const_int 1)))
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(set (reg:SI T_REG)
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@ -4142,7 +4142,7 @@ label:
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&& peep2_reg_dead_p (2, operands[1])"
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[(const_int 0)]
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{
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emit_insn (gen_ashlsi_c (operands[1], operands[1]));
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emit_insn (gen_shll (operands[1], operands[1]));
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DONE;
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})
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@ -4349,7 +4349,7 @@ label:
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"&& 1"
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[(const_int 0)]
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{
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emit_insn (gen_ashlsi_c (operands[0], operands[1]));
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emit_insn (gen_shll (operands[0], operands[1]));
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emit_insn (gen_mov_neg_si_t (operands[0], get_t_reg_rtx ()));
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DONE;
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})
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@ -4463,12 +4463,10 @@ label:
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;; . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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;; SImode logical shift right
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;; Only the single bit shift clobbers the T bit.
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(define_expand "lshrsi3"
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[(parallel [(set (match_operand:SI 0 "arith_reg_dest" "")
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[(set (match_operand:SI 0 "arith_reg_dest" "")
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(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "")
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(match_operand:SI 2 "nonmemory_operand" "")))
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(clobber (reg:SI T_REG))])]
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(match_operand:SI 2 "shift_count_operand" "")))]
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""
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{
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if (TARGET_SHMEDIA)
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@ -4476,29 +4474,137 @@ label:
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emit_insn (gen_lshrsi3_media (operands[0], operands[1], operands[2]));
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DONE;
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}
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if (CONST_INT_P (operands[2])
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&& sh_dynamicalize_shift_p (operands[2]))
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operands[2] = force_reg (SImode, operands[2]);
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/* If a dynamic shift is supposed to be used, expand the lshrsi3_d insn
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here, otherwise the pattern will never match due to the shift amount reg
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negation. */
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if (TARGET_DYNSHIFT
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&& arith_reg_operand (operands[2], GET_MODE (operands[2])))
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&& CONST_INT_P (operands[2]) && sh_dynamicalize_shift_p (operands[2]))
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{
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rtx count = copy_to_mode_reg (SImode, operands[2]);
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emit_insn (gen_negsi2 (count, count));
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emit_insn (gen_lshrsi3_d (operands[0], operands[1], count));
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rtx neg_count = force_reg (SImode,
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gen_int_mode (- INTVAL (operands[2]), SImode));
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emit_insn (gen_lshrsi3_d (operands[0], operands[1], neg_count));
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DONE;
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}
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if (TARGET_DYNSHIFT && ! CONST_INT_P (operands[2]))
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{
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rtx neg_count = gen_reg_rtx (SImode);
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emit_insn (gen_negsi2 (neg_count, operands[2]));
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emit_insn (gen_lshrsi3_d (operands[0], operands[1], neg_count));
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DONE;
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}
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/* If the lshrsi3_* insn is going to clobber the T_REG it must be
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expanded here. */
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if (CONST_INT_P (operands[2])
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&& sh_lshrsi_clobbers_t_reg_p (operands[2])
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&& ! sh_dynamicalize_shift_p (operands[2]))
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{
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emit_insn (gen_lshrsi3_n_clobbers_t (operands[0], operands[1],
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operands[2]));
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DONE;
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}
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if (! immediate_operand (operands[2], GET_MODE (operands[2])))
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FAIL;
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})
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(define_insn "lshrsi3_d"
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(define_insn "lshrsi3_k"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
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(neg:SI (match_operand:SI 2 "arith_reg_operand" "r"))))]
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(match_operand:SI 2 "p27_rshift_count_operand" "P27")))]
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"TARGET_SH1"
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"shlr%O2 %0"
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[(set_attr "type" "arith")])
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(define_insn_and_split "lshrsi3_d"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
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(neg:SI (match_operand:SI 2 "shift_count_operand" "r"))))]
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"TARGET_DYNSHIFT"
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"shld %2,%0"
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"&& CONST_INT_P (operands[2]) && ! sh_dynamicalize_shift_p (operands[2])
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&& ! sh_lshrsi_clobbers_t_reg_p (operands[2])"
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[(const_int 0)]
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{
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if (satisfies_constraint_P27 (operands[2]))
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{
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/* This will not be done for a shift amount of 1, because it would
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clobber the T_REG. */
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emit_insn (gen_lshrsi3_k (operands[0], operands[1], operands[2]));
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DONE;
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}
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else if (! satisfies_constraint_P27 (operands[2]))
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{
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/* This must happen before reload, otherwise the constant will be moved
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into a register due to the "r" constraint, after which this split
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cannot be done anymore.
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Unfortunately the move insn will not always be eliminated.
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Also, here we must not create a shift sequence that clobbers the
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T_REG. */
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emit_move_insn (operands[0], operands[1]);
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gen_shifty_op (LSHIFTRT, operands);
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DONE;
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}
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FAIL;
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}
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[(set_attr "type" "dyn_shift")])
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(define_insn_and_split "lshrsi3_n"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
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(match_operand:SI 2 "not_p27_rshift_count_operand")))]
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"TARGET_SH1 && ! sh_lshrsi_clobbers_t_reg_p (operands[2])"
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"#"
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"&& (reload_completed
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|| (sh_dynamicalize_shift_p (operands[2]) && can_create_pseudo_p ()))"
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[(const_int 0)]
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{
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if (sh_dynamicalize_shift_p (operands[2]) && can_create_pseudo_p ())
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{
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/* If this pattern was picked and dynamic shifts are supported, switch
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to dynamic shift pattern before reload. */
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operands[2] = force_reg (SImode,
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gen_int_mode (- INTVAL (operands[2]), SImode));
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emit_insn (gen_lshrsi3_d (operands[0], operands[1], operands[2]));
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}
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else
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gen_shifty_op (LSHIFTRT, operands);
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DONE;
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})
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;; The lshrsi3_n_clobbers_t pattern also works as a simplified version of
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;; the shlr pattern.
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(define_insn_and_split "lshrsi3_n_clobbers_t"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
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(match_operand:SI 2 "not_p27_rshift_count_operand")))
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(clobber (reg:SI T_REG))]
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"TARGET_SH1 && sh_lshrsi_clobbers_t_reg_p (operands[2])"
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"#"
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"&& (reload_completed || INTVAL (operands[2]) == 31
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|| (sh_dynamicalize_shift_p (operands[2]) && can_create_pseudo_p ()))"
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[(const_int 0)]
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{
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if (INTVAL (operands[2]) == 31)
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{
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emit_insn (gen_shll (operands[0], operands[1]));
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emit_insn (gen_movt (operands[0], get_t_reg_rtx ()));
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}
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else if (sh_dynamicalize_shift_p (operands[2]) && can_create_pseudo_p ())
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{
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/* If this pattern was picked and dynamic shifts are supported, switch
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to dynamic shift pattern before reload. */
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operands[2] = force_reg (SImode,
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gen_int_mode (- INTVAL (operands[2]), SImode));
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emit_insn (gen_lshrsi3_d (operands[0], operands[1], operands[2]));
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}
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else
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gen_shifty_op (LSHIFTRT, operands);
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DONE;
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})
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(define_insn "shlr"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
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@ -4509,38 +4615,6 @@ label:
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"shlr %0"
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[(set_attr "type" "arith")])
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(define_insn "lshrsi3_m"
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[(set (match_operand:SI 0 "arith_reg_dest" "=r")
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(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
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(match_operand:SI 2 "const_int_operand" "M")))
|
||||
(clobber (reg:SI T_REG))]
|
||||
"TARGET_SH1 && satisfies_constraint_M (operands[2])"
|
||||
"shlr %0"
|
||||
[(set_attr "type" "arith")])
|
||||
|
||||
(define_insn "lshrsi3_k"
|
||||
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
|
||||
(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
|
||||
(match_operand:SI 2 "const_int_operand" "P27")))]
|
||||
"TARGET_SH1 && satisfies_constraint_P27 (operands[2])
|
||||
&& ! satisfies_constraint_M (operands[2])"
|
||||
"shlr%O2 %0"
|
||||
[(set_attr "type" "arith")])
|
||||
|
||||
(define_insn_and_split "lshrsi3_n"
|
||||
[(set (match_operand:SI 0 "arith_reg_dest" "=r")
|
||||
(lshiftrt:SI (match_operand:SI 1 "arith_reg_operand" "0")
|
||||
(match_operand:SI 2 "const_int_operand" "n")))
|
||||
(clobber (reg:SI T_REG))]
|
||||
"TARGET_SH1 && ! sh_dynamicalize_shift_p (operands[2])"
|
||||
"#"
|
||||
"TARGET_SH1 && reload_completed"
|
||||
[(use (reg:SI R0_REG))]
|
||||
{
|
||||
gen_shifty_op (LSHIFTRT, operands);
|
||||
DONE;
|
||||
})
|
||||
|
||||
(define_insn "lshrsi3_media"
|
||||
[(set (match_operand:SI 0 "arith_reg_dest" "=r,r")
|
||||
(lshiftrt:SI (match_operand:SI 1 "extend_reg_operand" "r,r")
|
||||
|
|
|
|||
|
|
@ -1,3 +1,8 @@
|
|||
2012-08-22 Oleg Endo <olegendo@gcc.gnu.org>
|
||||
|
||||
PR target/54089
|
||||
* gcc.target/sh/pr54089-2.c: New.
|
||||
|
||||
2012-08-22 H.J. Lu <hongjiu.lu@intel.com>
|
||||
|
||||
* gcc.target/i386/long-double-64-1.c: New file.
|
||||
|
|
|
|||
|
|
@ -0,0 +1,22 @@
|
|||
/* Check that for dynamic logical right shifts with a constant the negated
|
||||
constant is loaded directly, instead of loading the postitive constant
|
||||
and negating it separately. This was a case that happened at optimization
|
||||
level -O2 and looked like:
|
||||
cmp/eq r6,r5
|
||||
mov #30,r1
|
||||
neg r1,r1
|
||||
shld r1,r4
|
||||
mov r4,r0
|
||||
rts
|
||||
rotcr r0 */
|
||||
/* { dg-do compile { target "sh*-*-*" } } */
|
||||
/* { dg-options "-O2" } */
|
||||
/* { dg-skip-if "" { "sh*-*-*" } { "*"} { "-m3* -m2a* -m4*" } } */
|
||||
/* { dg-final { scan-assembler-not "neg" } } */
|
||||
|
||||
unsigned int
|
||||
test (unsigned int a, int b, int c)
|
||||
{
|
||||
unsigned char r = b == c;
|
||||
return ((a >> 31) | (r << 31));
|
||||
}
|
||||
Loading…
Reference in New Issue