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arm: convert widen_[us]sum into convert optab [PR122069] 

This patch is a mechanical rewrite of the widen_[us]sum optabs from a direct to
a conversion optab.  The result of which requires the output mode to be added to
the existing patterns.

No change in functionality is expected.

gcc/ChangeLog:

	PR middle-end/122069
	* config/arm/iterators.md (v_double_width): New, matching
	V_double_width.
	* config/arm/neon.md (widen_ssum<mode>3): Renamed ...
	(widen_ssum<v_double_width><mode>3, widen_ssum<V_widen_l><mode>3): ...
	into these.
	(widen_usum<mode>3): Renamed ...
	(widen_usum<v_double_width><mode>3, widen_usum<V_widen_l><mode>3): ...
	into these.
This commit is contained in:
Tamar Christina 2025-10-18 08:20:47 +01:00
parent c8dc5d5070
commit 7793947247
2 changed files with 9 additions and 4 deletions
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5
gcc/config/arm/iterators.md
View File

@ -1788,6 +1788,11 @@
(V4HI "V2SI") (V8HI "V4SI") (V4HI "V2SI") (V8HI "V4SI")
(V2SI "DI") (V4SI "V2DI")]) (V2SI "DI") (V4SI "V2DI")])
;; Modes with double-width elements.
(define_mode_attr v_double_width [(V8QI "v4hi") (V16QI "v8hi")
(V4HI "v2si") (V8HI "v4si")
(V2SI "di") (V4SI "v2di")])
;; Double-sized modes with the same element size. ;; Double-sized modes with the same element size.
;; Used for neon_vdup_lane, where the second operand is double-sized ;; Used for neon_vdup_lane, where the second operand is double-sized
;; even when the first one is quad. ;; even when the first one is quad.

8
gcc/config/arm/neon.md
View File

@ -981,7 +981,7 @@
;; Widening operations ;; Widening operations
(define_expand "widen_ssum<mode>3" (define_expand "widen_ssum<v_double_width><mode>3"
[(set (match_operand:<V_double_width> 0 "s_register_operand") [(set (match_operand:<V_double_width> 0 "s_register_operand")
(plus:<V_double_width> (plus:<V_double_width>
(sign_extend:<V_double_width> (sign_extend:<V_double_width>
@ -1040,7 +1040,7 @@
} }
[(set_attr "type" "neon_add_widen")]) [(set_attr "type" "neon_add_widen")])
(define_insn "widen_ssum<mode>3" (define_insn "widen_ssum<V_widen_l><mode>3"
[(set (match_operand:<V_widen> 0 "s_register_operand" "=w") [(set (match_operand:<V_widen> 0 "s_register_operand" "=w")
(plus:<V_widen> (plus:<V_widen>
(sign_extend:<V_widen> (sign_extend:<V_widen>
@ -1051,7 +1051,7 @@
[(set_attr "type" "neon_add_widen")] [(set_attr "type" "neon_add_widen")]
) )
(define_expand "widen_usum<mode>3" (define_expand "widen_usum<v_double_width><mode>3"
[(set (match_operand:<V_double_width> 0 "s_register_operand") [(set (match_operand:<V_double_width> 0 "s_register_operand")
(plus:<V_double_width> (plus:<V_double_width>
(zero_extend:<V_double_width> (zero_extend:<V_double_width>
@ -1110,7 +1110,7 @@
} }
[(set_attr "type" "neon_add_widen")]) [(set_attr "type" "neon_add_widen")])
(define_insn "widen_usum<mode>3" (define_insn "widen_usum<V_widen_l><mode>3"
[(set (match_operand:<V_widen> 0 "s_register_operand" "=w") [(set (match_operand:<V_widen> 0 "s_register_operand" "=w")
(plus:<V_widen> (zero_extend:<V_widen> (plus:<V_widen> (zero_extend:<V_widen>
(match_operand:VW 1 "s_register_operand" "%w")) (match_operand:VW 1 "s_register_operand" "%w"))