mirror of git://gcc.gnu.org/git/gcc.git
i386: Extract the guts of mulv16qi3 to ix86_expand_vecop_qihi
* config/i386/sse.md (mul<VI1_AVX2>3): Change from insn_and_split to
pure expander; move expansion code ...
* config/i386/i386.c (ix86_expand_vecop_qihi): ... here. New function.
* config/i386/i386-protos.h: Update.
From-SVN: r188907
This commit is contained in:
Richard Henderson
Richard Henderson
parent
6b39c806f3
commit
77a3dbf6c4
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@ -1,3 +1,10 @@
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2012-06-23 Richard Henderson <rth@redhat.com>
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* config/i386/sse.md (mul<VI1_AVX2>3): Change from insn_and_split to
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pure expander; move expansion code ...
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* config/i386/i386.c (ix86_expand_vecop_qihi): ... here. New function.
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* config/i386/i386-protos.h: Update.
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2012-06-22 Edmar Wienskoski <edmar@freescale.com>
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* config/rs6000/rs6000.md (define_attr "type"): New type popcnt.
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@ -192,6 +192,8 @@ extern void ix86_expand_rounddf_32 (rtx, rtx);
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extern void ix86_expand_trunc (rtx, rtx);
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extern void ix86_expand_truncdf_32 (rtx, rtx);
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extern void ix86_expand_vecop_qihi (enum rtx_code, rtx, rtx, rtx);
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#ifdef TREE_CODE
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extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int);
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#endif /* TREE_CODE */
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@ -38438,6 +38438,91 @@ ix86_expand_vec_extract_even_odd (rtx targ, rtx op0, rtx op1, unsigned odd)
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expand_vec_perm_even_odd_1 (&d, odd);
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}
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/* Expand a vector operation CODE for a V*QImode in terms of the
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same operation on V*HImode. */
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void
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ix86_expand_vecop_qihi (enum rtx_code code, rtx dest, rtx op1, rtx op2)
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{
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enum machine_mode qimode = GET_MODE (dest);
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enum machine_mode himode;
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rtx (*gen_il) (rtx, rtx, rtx);
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rtx (*gen_ih) (rtx, rtx, rtx);
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rtx op1_l, op1_h, op2_l, op2_h, res_l, res_h;
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struct expand_vec_perm_d d;
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bool ok;
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int i;
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if (qimode == V16QImode)
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{
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himode = V8HImode;
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gen_il = gen_vec_interleave_lowv16qi;
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gen_ih = gen_vec_interleave_highv16qi;
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}
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else if (qimode == V32QImode)
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{
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himode = V16HImode;
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gen_il = gen_avx2_interleave_lowv32qi;
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gen_ih = gen_avx2_interleave_highv32qi;
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}
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else
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gcc_unreachable ();
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/* Unpack data such that we've got a source byte in each low byte of
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each word. We don't care what goes into the high byte of each word.
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Rather than trying to get zero in there, most convenient is to let
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it be a copy of the low byte. */
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op1_l = gen_reg_rtx (qimode);
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op1_h = gen_reg_rtx (qimode);
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emit_insn (gen_il (op1_l, op1, op1));
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emit_insn (gen_ih (op1_h, op1, op1));
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op2_l = gen_reg_rtx (qimode);
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op2_h = gen_reg_rtx (qimode);
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emit_insn (gen_il (op2_l, op2, op2));
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emit_insn (gen_ih (op2_h, op2, op2));
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/* Perform the operation. */
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res_l = expand_simple_binop (himode, code, gen_lowpart (himode, op1_l),
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gen_lowpart (himode, op2_l), NULL_RTX,
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1, OPTAB_DIRECT);
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res_h = expand_simple_binop (himode, code, gen_lowpart (himode, op1_h),
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gen_lowpart (himode, op2_h), NULL_RTX,
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1, OPTAB_DIRECT);
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gcc_assert (res_l && res_h);
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/* Merge the data back into the right place. */
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d.target = dest;
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d.op0 = gen_lowpart (qimode, res_l);
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d.op1 = gen_lowpart (qimode, res_h);
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d.vmode = qimode;
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d.nelt = GET_MODE_NUNITS (qimode);
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d.one_operand_p = false;
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d.testing_p = false;
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if (qimode == V16QImode)
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{
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/* For SSE2, we used an full interleave, so the desired
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results are in the even elements. */
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for (i = 0; i < 16; ++i)
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d.perm[i] = i * 2;
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}
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else
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{
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/* For AVX, the interleave used above was not cross-lane. So the
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extraction is evens but with the second and third quarter swapped.
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Happily, that is even one insn shorter than even extraction. */
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for (i = 0; i < 32; ++i)
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d.perm[i] = i * 2 + ((i & 24) == 8 ? 16 : (i & 24) == 16 ? -16 : 0);
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}
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ok = ix86_expand_vec_perm_const_1 (&d);
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gcc_assert (ok);
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set_unique_reg_note (get_last_insn (), REG_EQUAL,
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gen_rtx_fmt_ee (code, qimode, op1, op2));
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}
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void
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ix86_expand_sse2_mulv4si3 (rtx op0, rtx op1, rtx op2)
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{
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@ -5213,70 +5213,13 @@
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(set_attr "prefix" "orig,vex")
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(set_attr "mode" "TI")])
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(define_insn_and_split "mul<mode>3"
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(define_expand "mul<mode>3"
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[(set (match_operand:VI1_AVX2 0 "register_operand")
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(mult:VI1_AVX2 (match_operand:VI1_AVX2 1 "register_operand")
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(match_operand:VI1_AVX2 2 "register_operand")))]
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"TARGET_SSE2
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&& can_create_pseudo_p ()"
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"#"
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"&& 1"
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[(const_int 0)]
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"TARGET_SSE2"
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{
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rtx t[6];
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int i;
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enum machine_mode mulmode = <sseunpackmode>mode;
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for (i = 0; i < 6; ++i)
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t[i] = gen_reg_rtx (<MODE>mode);
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/* Unpack data such that we've got a source byte in each low byte of
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each word. We don't care what goes into the high byte of each word.
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Rather than trying to get zero in there, most convenient is to let
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it be a copy of the low byte. */
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emit_insn (gen_<vec_avx2>_interleave_high<mode> (t[0], operands[1],
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operands[1]));
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emit_insn (gen_<vec_avx2>_interleave_high<mode> (t[1], operands[2],
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operands[2]));
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emit_insn (gen_<vec_avx2>_interleave_low<mode> (t[2], operands[1],
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operands[1]));
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emit_insn (gen_<vec_avx2>_interleave_low<mode> (t[3], operands[2],
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operands[2]));
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/* Multiply words. The end-of-line annotations here give a picture of what
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the output of that instruction looks like. Dot means don't care; the
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letters are the bytes of the result with A being the most significant. */
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emit_insn (gen_rtx_SET (VOIDmode, gen_lowpart (mulmode, t[4]),
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gen_rtx_MULT (mulmode, /* .A.B.C.D.E.F.G.H */
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gen_lowpart (mulmode, t[0]),
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gen_lowpart (mulmode, t[1]))));
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emit_insn (gen_rtx_SET (VOIDmode, gen_lowpart (mulmode, t[5]),
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gen_rtx_MULT (mulmode, /* .I.J.K.L.M.N.O.P */
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gen_lowpart (mulmode, t[2]),
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gen_lowpart (mulmode, t[3]))));
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/* Extract the even bytes and merge them back together. */
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if (<MODE>mode == V16QImode)
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ix86_expand_vec_extract_even_odd (operands[0], t[5], t[4], 0);
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else
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{
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/* Since avx2_interleave_{low,high}v32qi used above aren't cross-lane,
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this can't be normal even extraction, but one where additionally
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the second and third quarter are swapped. That is even one insn
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shorter than even extraction. */
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rtvec v = rtvec_alloc (32);
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for (i = 0; i < 32; ++i)
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RTVEC_ELT (v, i)
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= GEN_INT (i * 2 + ((i & 24) == 8 ? 16 : (i & 24) == 16 ? -16 : 0));
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t[0] = operands[0];
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t[1] = t[5];
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t[2] = t[4];
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t[3] = gen_rtx_CONST_VECTOR (<MODE>mode, v);
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ix86_expand_vec_perm_const (t);
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}
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set_unique_reg_note (get_last_insn (), REG_EQUAL,
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gen_rtx_MULT (<MODE>mode, operands[1], operands[2]));
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ix86_expand_vecop_qihi (MULT, operands[0], operands[1], operands[2]);
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DONE;
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})
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