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re PR target/77934 (pattern for mtvsrdd needs to use b constraint not r) 

2016-10-12  Aaron Sawdey  <acsawdey@linux.vnet.ibm.com>

	PR target/77934
	* config/rs6000/vmx.md (vsx_concat_<mode>): The mtvsrdd instruction
	needs a base register for arg 1.

From-SVN: r241017
This commit is contained in:
Aaron Sawdey 2016-10-12 02:12:06 +00:00 committed by Aaron Sawdey
parent 9833e9315b
commit 83d3ca2849
2 changed files with 8 additions and 2 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2016-10-12 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
PR target/77934
* config/rs6000/vmx.md (vsx_concat_<mode>): The mtvsrdd instruction
needs a base register for arg 1.
2016-10-12 Jakub Jelinek <jakub@redhat.com> 2016-10-12 Jakub Jelinek <jakub@redhat.com>
* common.opt (Wimplicit-fallthrough) Turn into alias to * common.opt (Wimplicit-fallthrough) Turn into alias to

4
gcc/config/rs6000/vsx.md
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@ -1938,8 +1938,8 @@
(define_insn "vsx_concat_<mode>" (define_insn "vsx_concat_<mode>"
[(set (match_operand:VSX_D 0 "gpc_reg_operand" "=<VSa>,we") [(set (match_operand:VSX_D 0 "gpc_reg_operand" "=<VSa>,we")
(vec_concat:VSX_D (vec_concat:VSX_D
(match_operand:<VS_scalar> 1 "gpc_reg_operand" "<VS_64reg>,r") (match_operand:<VS_scalar> 1 "gpc_reg_operand" "<VS_64reg>,b")
(match_operand:<VS_scalar> 2 "gpc_reg_operand" "<VS_64reg>,r")))] (match_operand:<VS_scalar> 2 "gpc_reg_operand" "<VS_64reg>,b")))]
"VECTOR_MEM_VSX_P (<MODE>mode)" "VECTOR_MEM_VSX_P (<MODE>mode)"
{ {
if (which_alternative == 0) if (which_alternative == 0)