darwin.h (TARGET_OPTION_TRANSLATE_TABLE): Refer to SUBTARGET_OPTION_TRANSLATE_TABLE for architecture-specific options.

[gcc/ChangeLog]
2004-02-21  Ziemowit Laski  <zlaski@apple.com>

        * config/darwin.h (TARGET_OPTION_TRANSLATE_TABLE): Refer to
        SUBTARGET_OPTION_TRANSLATE_TABLE for architecture-specific options.
        * config/i386/darwin.h (SUBTARGET_OPTION_TRANSLATE_TABLE): Define it.
        * config/rs6000/altivec.h: #error out if '-maltivec' not specified.
        (vector, pixel, bool): #define to __vector, __pixel and __bool.
        (__un_args_eq, __bin_args_eq, __tern_args_eq): Move to C-specific
        portion of header.
        (__altivec_link_error_invalid_argument): Remove prototype; will use
        __builtin_altivec_compiletime_error("vec_*") instead.
        (vec_*): Fix/complete set of available operation overloads given the
        existence of distinct 'vector bool ...' and 'vector pixel' types; tighten
        cv-correctness of pointer arguments; in C, always check for correct
        argument types before macro expansion.
        * config/rs6000/darwin.h (SUBTARGET_OPTION_TRANSLATE_TABLE): New macro
        defining Darwin/PowerPC-specific '-f[no-]altivec' and
        '-W[no-]altivec-long-deprecated' switches.
        * config/rs6000/rs6000-c (rs6000_cpu_cpp_builtins): Pre-define
        '__vector', '__pixel' and '__bool' macros using
        '__attribute__((altivec(...)))' types.
        * config/rs6000/rs6000.c (bool_char_type_node, bool_short_type_node,
        bool_int_type_node, pixel_type_node, bool_V16QI_type_node,
        bool_V8HI_type_node, bool_V4SI_type_node, pixel_V8HI_type_node):
        New type nodes.
        (rs6000_warn_altivec_long, rs6000_warn_altivec_long_switch): New, for
        handling '-W[no-]altivec-long-deprecated'.
        (rs6000_override_options): Handle '-W[no-]altivec-long-deprecated'.
        (rs6000_expand_binop_builtin, rs6000_expand_ternop_builtin,
        altivec_expand_dst_builtin): Remove casts from integer literals.
        (altivec_expand_builtin): Likewise; handle expansion of new
        '__builtin_altivec_compiletime_error' function.
        (rs6000_init_builtins): Initialize 'vector bool ...' and 'vector pixel'
        types, and make them distinct from other vector types; register
        '__builtin_altivec_compiletime_error' function.
        (print_operand): For 'P', print a full target register name instead of
        merely its number.
        (rs6000_attribute_table): Add "altivec" attribute.
        (rs6000_handle_altivec_attribute): New function.
        * config/rs6000/rs6000.h (TARGET_OPTIONS): Describe
        '-m[no-]-warn-altivec-long' (which '-W[no-]altivec-long-deprecated'
        maps to).
        (rs6000_warn_altivec_long, rs6000_warn_altivec_long_switch): Forward
        declare.
        (ALTIVEC_BUILTIN_COMPILETIME_ERROR): New built-in enumeration.

[gcc/testsuite/ChangeLog]
2004-02-21  Ziemowit Laski  <zlaski@apple.com>

        * g++.dg/ext/altivec-1.C: Generalize target triple.
        * g++.dg/ext/altivec-2.C: New test case.
        * g++.dg/ext/altivec_check.h: New file.
        * gcc.dg/altivec-1.c: Generalize target triple;
        include altivec_check.h and call altivec_check().
        * gcc.dg/altivec-[2-5].c: Generalize target triple.
        * gcc.dg/altivec-6.c: New test case.
        * gcc.dg/altivec-[7-9].c: Generalize target triple; add
        type casts as needed.
        * gcc.dg/altivec-10.c: Include altivec_check.h and call
        altivec_check().
        * gcc.dg/altivec-12.c: New test case.
        * gcc.dg/altivec-varargs-1.c: Generalize target triple;
        include altivec_check.h and call altivec_check().
        * gcc.dg/altivec_check.h: New file.

From-SVN: r78215

gcc/ChangeLog

@@ -1,3 +1,49 @@
+2004-02-21  Ziemowit Laski  <zlaski@apple.com>
+
+	* config/darwin.h (TARGET_OPTION_TRANSLATE_TABLE): Refer to
+	SUBTARGET_OPTION_TRANSLATE_TABLE for architecture-specific options.
+	* config/i386/darwin.h (SUBTARGET_OPTION_TRANSLATE_TABLE): Define it.
+	* config/rs6000/altivec.h: #error out if '-maltivec' not specified.
+	(vector, pixel, bool): #define to __vector, __pixel and __bool.
+	(__un_args_eq, __bin_args_eq, __tern_args_eq): Move to C-specific
+	portion of header.
+	(__altivec_link_error_invalid_argument): Remove prototype; will use
+	__builtin_altivec_compiletime_error("vec_*") instead.
+	(vec_*): Fix/complete set of available operation overloads given the
+	existence of distinct 'vector bool ...' and 'vector pixel' types; tighten
+	cv-correctness of pointer arguments; in C, always check for correct
+	argument types before macro expansion.
+	* config/rs6000/darwin.h (SUBTARGET_OPTION_TRANSLATE_TABLE): New macro
+	defining Darwin/PowerPC-specific '-f[no-]altivec' and
+	'-W[no-]altivec-long-deprecated' switches.
+	* config/rs6000/rs6000-c (rs6000_cpu_cpp_builtins): Pre-define
+	'__vector', '__pixel' and '__bool' macros using
+	'__attribute__((altivec(...)))' types.
+	* config/rs6000/rs6000.c (bool_char_type_node, bool_short_type_node,
+	bool_int_type_node, pixel_type_node, bool_V16QI_type_node,
+	bool_V8HI_type_node, bool_V4SI_type_node, pixel_V8HI_type_node):
+	New type nodes.
+	(rs6000_warn_altivec_long, rs6000_warn_altivec_long_switch): New, for
+	handling '-W[no-]altivec-long-deprecated'.
+	(rs6000_override_options): Handle '-W[no-]altivec-long-deprecated'.
+	(rs6000_expand_binop_builtin, rs6000_expand_ternop_builtin,
+	altivec_expand_dst_builtin): Remove casts from integer literals.
+	(altivec_expand_builtin): Likewise; handle expansion of new
+	'__builtin_altivec_compiletime_error' function.
+	(rs6000_init_builtins): Initialize 'vector bool ...' and 'vector pixel'
+	types, and make them distinct from other vector types; register
+	'__builtin_altivec_compiletime_error' function.
+	(print_operand): For 'P', print a full target register name instead of
+	merely its number.
+	(rs6000_attribute_table): Add "altivec" attribute.
+	(rs6000_handle_altivec_attribute): New function.
+	* config/rs6000/rs6000.h (TARGET_OPTIONS): Describe 
+	'-m[no-]-warn-altivec-long' (which '-W[no-]altivec-long-deprecated'
+	maps to).
+	(rs6000_warn_altivec_long, rs6000_warn_altivec_long_switch): Forward
+	declare.
+	(ALTIVEC_BUILTIN_COMPILETIME_ERROR): New built-in enumeration.
+
 2004-02-20  James E Wilson  <wilson@specifixinc.com>
 
 	* config/ia64/ia64.md (shift_mix4left+1): Delete reload_completed

gcc/config/darwin.h

@@ -97,7 +97,13 @@ Boston, MA 02111-1307, USA.  */
    Note that an option name with a prefix that matches another option
    name, that also takes an argument, needs to be modified so the
    prefix is different, otherwise a '*' after the shorter option will
-   match with the longer one.  */
+   match with the longer one.
+   
+   The SUBTARGET_OPTION_TRANSLATE_TABLE macro, which _must_ be defined
+   in gcc/config/{i386,rs6000}/darwin.h, should contain any additional
+   command-line option translations specific to the particular target
+   architecture.  */
+   
 #define TARGET_OPTION_TRANSLATE_TABLE \
   { "-all_load", "-Zall_load" },  \
   { "-allowable_client", "-Zallowable_client" },  \
@@ -124,8 +130,9 @@ Boston, MA 02111-1307, USA.  */
   { "-multi_module", "-Zmulti_module" },  \
   { "-static", "-static -Wa,-static" },  \
   { "-single_module", "-Zsingle_module" },  \
-  { "-unexported_symbols_list", "-Zunexported_symbols_list" }
+  { "-unexported_symbols_list", "-Zunexported_symbols_list" }, \
-
+  SUBTARGET_OPTION_TRANSLATE_TABLE
+  
 /* These compiler options take n arguments.  */
 
 #undef  WORD_SWITCH_TAKES_ARG

gcc/config/i386/darwin.h

@@ -51,6 +51,10 @@ Boston, MA 02111-1307, USA.  */
 #define SUBTARGET_EXTRA_SPECS			\
   { "darwin_arch", "i386" },
 
+/* Use the following macro for any Darwin/x86-specific command-line option
+   translation.  */
+#define SUBTARGET_OPTION_TRANSLATE_TABLE
+
 /* The Darwin assembler mostly follows AT&T syntax.  */
 #undef ASSEMBLER_DIALECT
 #define ASSEMBLER_DIALECT ASM_ATT

gcc/config/rs6000/darwin.h

@@ -111,6 +111,13 @@ do {									\
 #define SUBTARGET_EXTRA_SPECS			\
   { "darwin_arch", "ppc" },
 
+/* The "-faltivec" option should have been called "-maltivec" all along.  */
+#define SUBTARGET_OPTION_TRANSLATE_TABLE				\
+  { "-faltivec", "-maltivec -include altivec.h" },	\
+  { "-fno-altivec", "-mno-altivec" },	\
+  { "-Waltivec-long-deprecated",	"-mwarn-altivec-long" }, \
+  { "-Wno-altivec-long-deprecated", "-mno-warn-altivec-long" }
+
 /* Make both r2 and r3 available for allocation.  */
 #define FIXED_R2 0
 #define FIXED_R13 0

gcc/config/rs6000/rs6000-c.c

@@ -92,7 +92,15 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
   if (! TARGET_POWER && ! TARGET_POWER2 && ! TARGET_POWERPC)
     builtin_define ("_ARCH_COM");
   if (TARGET_ALTIVEC)
-    builtin_define ("__ALTIVEC__");
+    {
+      builtin_define ("__ALTIVEC__");
+      builtin_define ("__VEC__=10206");
+
+      /* Define the AltiVec syntactic elements.  */
+      builtin_define ("__vector=__attribute__((altivec(vector__)))");
+      builtin_define ("__pixel=__attribute__((altivec(pixel__))) unsigned short");
+      builtin_define ("__bool=__attribute__((altivec(bool__))) unsigned");
+    }
   if (TARGET_SPE)
     builtin_define ("__SPE__");
   if (TARGET_SOFT_FLOAT)

gcc/config/rs6000/rs6000.c

@@ -217,6 +217,20 @@ static GTY(()) tree opaque_V2SI_type_node;
 static GTY(()) tree opaque_V2SF_type_node;
 static GTY(()) tree opaque_p_V2SI_type_node;
 
+/* AltiVec requires a few more basic types in addition to the vector
+   types already defined in tree.c.  */
+static GTY(()) tree bool_char_type_node;	/* __bool char */
+static GTY(()) tree bool_short_type_node;	/* __bool short */
+static GTY(()) tree bool_int_type_node;		/* __bool int */
+static GTY(()) tree pixel_type_node;		/* __pixel */
+static GTY(()) tree bool_V16QI_type_node;	/* __vector __bool char */
+static GTY(()) tree bool_V8HI_type_node;	/* __vector __bool short */
+static GTY(()) tree bool_V4SI_type_node;	/* __vector __bool int */
+static GTY(()) tree pixel_V8HI_type_node;	/* __vector __pixel */
+
+int rs6000_warn_altivec_long = 1;		/* On by default. */
+const char *rs6000_warn_altivec_long_switch;
+
 const char *rs6000_traceback_name;
 static enum {
   traceback_default = 0,
@@ -287,6 +301,7 @@ static void rs6000_assemble_visibility (tree, int);
 #endif
 static int rs6000_ra_ever_killed (void);
 static tree rs6000_handle_longcall_attribute (tree *, tree, tree, int, bool *);
+static tree rs6000_handle_altivec_attribute (tree *, tree, tree, int, bool *);
 extern const struct attribute_spec rs6000_attribute_table[];
 static void rs6000_set_default_type_attributes (tree);
 static void rs6000_output_function_prologue (FILE *, HOST_WIDE_INT);
@@ -913,6 +928,17 @@ rs6000_override_options (const char *default_cpu)
       rs6000_default_long_calls = (base[0] != 'n');
     }
 
+  /* Handle -m(no-)warn-altivec-long similarly.  */
+  if (rs6000_warn_altivec_long_switch)
+    {
+      const char *base = rs6000_warn_altivec_long_switch;
+      while (base[-1] != 'm') base--;
+
+      if (*rs6000_warn_altivec_long_switch != '\0')
+	error ("invalid option `%s'", base);
+      rs6000_warn_altivec_long = (base[0] != 'n');
+    }
+
   /* Handle -mprioritize-restricted-insns option.  */
   rs6000_sched_restricted_insns_priority = DEFAULT_RESTRICTED_INSNS_PRIORITY;
   if (rs6000_sched_restricted_insns_priority_str)
@@ -5465,6 +5491,7 @@ rs6000_expand_binop_builtin (enum insn_code icode, tree arglist, rtx target)
       || icode == CODE_FOR_spe_evsrwiu)
     {
       /* Only allow 5-bit unsigned literals.  */
+      STRIP_NOPS (arg1);
       if (TREE_CODE (arg1) != INTEGER_CST
 	  || TREE_INT_CST_LOW (arg1) & ~0x1f)
 	{
@@ -5687,6 +5714,7 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree arglist, rtx target)
       || icode == CODE_FOR_altivec_vsldoi_16qi)
     {
       /* Only allow 4-bit unsigned literals.  */
+      STRIP_NOPS (arg2);
       if (TREE_CODE (arg2) != INTEGER_CST
 	  || TREE_INT_CST_LOW (arg2) & ~0xf)
 	{
@@ -5857,6 +5885,7 @@ altivec_expand_dst_builtin (tree exp, rtx target ATTRIBUTE_UNUSED,
 	    || arg2 == error_mark_node)
 	  return const0_rtx;
 
+	STRIP_NOPS (arg2);
 	if (TREE_CODE (arg2) != INTEGER_CST
 	    || TREE_INT_CST_LOW (arg2) & ~0x3)
 	  {
@@ -5963,6 +5992,7 @@ altivec_expand_builtin (tree exp, rtx target, bool *expandedp)
     case ALTIVEC_BUILTIN_DSS:
       icode = CODE_FOR_altivec_dss;
       arg0 = TREE_VALUE (arglist);
+      STRIP_NOPS (arg0);
       op0 = expand_expr (arg0, NULL_RTX, VOIDmode, 0);
       mode0 = insn_data[icode].operand[0].mode;
 
@@ -5982,6 +6012,15 @@ altivec_expand_builtin (tree exp, rtx target, bool *expandedp)
 
       emit_insn (gen_altivec_dss (op0));
       return NULL_RTX;
+      
+    case ALTIVEC_BUILTIN_COMPILETIME_ERROR:
+      arg0 = TREE_VALUE (arglist);
+      while (TREE_CODE (arg0) == NOP_EXPR || TREE_CODE (arg0) == ADDR_EXPR)
+	arg0 = TREE_OPERAND (arg0, 0);
+      error ("invalid parameter combination for `%s' AltiVec intrinsic",
+	     TREE_STRING_POINTER (arg0));
+
+      return const0_rtx;
     }
 
   /* Expand abs* operations.  */
@@ -6421,6 +6460,74 @@ rs6000_init_builtins (void)
   opaque_V2SF_type_node = copy_node (V2SF_type_node);
   opaque_p_V2SI_type_node = build_pointer_type (opaque_V2SI_type_node);
 
+  /* The 'vector bool ...' types must be kept distinct from 'vector unsigned ...'
+     types, especially in C++ land.  Similarly, 'vector pixel' is distinct from
+     'vector unsigned short'.  */
+
+  bool_char_type_node = copy_node (unsigned_intQI_type_node);
+  TYPE_MAIN_VARIANT (bool_char_type_node) = bool_char_type_node;
+  bool_short_type_node = copy_node (unsigned_intHI_type_node);
+  TYPE_MAIN_VARIANT (bool_short_type_node) = bool_short_type_node;
+  bool_int_type_node = copy_node (unsigned_intSI_type_node);
+  TYPE_MAIN_VARIANT (bool_int_type_node) = bool_int_type_node;
+  pixel_type_node = copy_node (unsigned_intHI_type_node);
+  TYPE_MAIN_VARIANT (pixel_type_node) = pixel_type_node;
+
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__bool char"),
+					    bool_char_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__bool short"),
+					    bool_short_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__bool int"),
+					    bool_int_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__pixel"),
+					    pixel_type_node));
+
+  bool_V16QI_type_node = make_vector (V16QImode, bool_char_type_node, 1);
+  bool_V8HI_type_node = make_vector (V8HImode, bool_short_type_node, 1);
+  bool_V4SI_type_node = make_vector (V4SImode, bool_int_type_node, 1);
+  pixel_V8HI_type_node = make_vector (V8HImode, pixel_type_node, 1);
+
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector unsigned char"),
+					    unsigned_V16QI_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector signed char"),
+					    V16QI_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector __bool char"),
+					    bool_V16QI_type_node));
+
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector unsigned short"),
+					    unsigned_V8HI_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector signed short"),
+					    V8HI_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector __bool short"),
+					    bool_V8HI_type_node));
+
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector unsigned int"),
+					    unsigned_V4SI_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector signed int"),
+					    V4SI_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector __bool int"),
+					    bool_V4SI_type_node));
+
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector float"),
+					    V4SF_type_node));
+  (*lang_hooks.decls.pushdecl) (build_decl (TYPE_DECL,
+					    get_identifier ("__vector __pixel"),
+					    pixel_V8HI_type_node));
+
   if (TARGET_SPE)
     spe_init_builtins ();
   if (TARGET_ALTIVEC)
@@ -6771,11 +6878,14 @@ altivec_init_builtins (void)
     = build_function_type_list (V16QI_type_node, V16QI_type_node, NULL_TREE);
   tree v4sf_ftype_v4sf
     = build_function_type_list (V4SF_type_node, V4SF_type_node, NULL_TREE);
-  tree void_ftype_pcvoid_int_char
+  tree void_ftype_pcvoid_int_int
     = build_function_type_list (void_type_node,
 				pcvoid_type_node, integer_type_node,
-				char_type_node, NULL_TREE);
+				integer_type_node, NULL_TREE);
-  
+  tree int_ftype_pcchar
+    = build_function_type_list (integer_type_node,
+				pcchar_type_node, NULL_TREE);
+
   def_builtin (MASK_ALTIVEC, "__builtin_altivec_ld_internal_4sf", v4sf_ftype_pcfloat,
 	       ALTIVEC_BUILTIN_LD_INTERNAL_4sf);
   def_builtin (MASK_ALTIVEC, "__builtin_altivec_st_internal_4sf", void_ftype_pfloat_v4sf,
@@ -6809,10 +6919,14 @@ altivec_init_builtins (void)
   def_builtin (MASK_ALTIVEC, "__builtin_altivec_stvebx", void_ftype_v16qi_long_pvoid, ALTIVEC_BUILTIN_STVEBX);
   def_builtin (MASK_ALTIVEC, "__builtin_altivec_stvehx", void_ftype_v8hi_long_pvoid, ALTIVEC_BUILTIN_STVEHX);
 
+  /* See altivec.h for usage of "__builtin_altivec_compiletime_error".  */
+  def_builtin (MASK_ALTIVEC, "__builtin_altivec_compiletime_error", int_ftype_pcchar,
+	       ALTIVEC_BUILTIN_COMPILETIME_ERROR);
+
   /* Add the DST variants.  */
   d = (struct builtin_description *) bdesc_dst;
   for (i = 0; i < ARRAY_SIZE (bdesc_dst); i++, d++)
-    def_builtin (d->mask, d->name, void_ftype_pcvoid_int_char, d->code);
+    def_builtin (d->mask, d->name, void_ftype_pcvoid_int_int, d->code);
 
   /* Initialize the predicates.  */
   dp = (struct builtin_description_predicates *) bdesc_altivec_preds;
@@ -8896,12 +9010,12 @@ print_operand (FILE *file, rtx x, int code)
 
     case 'P':
       /* The operand must be an indirect memory reference.  The result
-	 is the register number.  */
+	 is the register name.  */
       if (GET_CODE (x) != MEM || GET_CODE (XEXP (x, 0)) != REG
 	  || REGNO (XEXP (x, 0)) >= 32)
 	output_operand_lossage ("invalid %%P value");
       else
-	fprintf (file, "%d", REGNO (XEXP (x, 0)));
+	fprintf (file, "%s", reg_names[REGNO (XEXP (x, 0))]);
       return;
 
     case 'q':
@@ -14546,11 +14660,99 @@ rs6000_initialize_trampoline (rtx addr, rtx fnaddr, rtx cxt)
 const struct attribute_spec rs6000_attribute_table[] =
 {
   /* { name, min_len, max_len, decl_req, type_req, fn_type_req, handler } */
+  { "altivec",   1, 1, false, true,  false, rs6000_handle_altivec_attribute },
   { "longcall",  0, 0, false, true,  true,  rs6000_handle_longcall_attribute },
   { "shortcall", 0, 0, false, true,  true,  rs6000_handle_longcall_attribute },
   { NULL,        0, 0, false, false, false, NULL }
 };
 
+/* Handle the "altivec" attribute.  The attribute may have
+   arguments as follows:
+   
+	__attribute__((altivec(vector__)))
+	__attribute__((altivec(pixel__)))	(always followed by 'unsigned short')
+	__attribute__((altivec(bool__)))	(always followed by 'unsigned')
+
+  and may appear more than once (e.g., 'vector bool char') in a
+  given declaration.  */
+
+static tree
+rs6000_handle_altivec_attribute (tree *node, tree name, tree args,
+				 int flags ATTRIBUTE_UNUSED,
+				 bool *no_add_attrs)
+{
+  tree type = *node, result = NULL_TREE;
+  enum machine_mode mode;
+  int unsigned_p;
+  char altivec_type
+    = ((args && TREE_CODE (args) == TREE_LIST && TREE_VALUE (args)
+	&& TREE_CODE (TREE_VALUE (args)) == IDENTIFIER_NODE)
+       ? *IDENTIFIER_POINTER (TREE_VALUE (args))
+       : '?'); 
+
+  while (POINTER_TYPE_P (type)
+	 || TREE_CODE (type) == FUNCTION_TYPE
+	 || TREE_CODE (type) == METHOD_TYPE
+	 || TREE_CODE (type) == ARRAY_TYPE)
+    type = TREE_TYPE (type);
+
+  mode = TYPE_MODE (type);
+
+  if (rs6000_warn_altivec_long
+      && (type == long_unsigned_type_node || type == long_integer_type_node))
+    warning ("use of 'long' in AltiVec types is deprecated; use 'int'");
+
+  switch (altivec_type)
+    {
+    case 'v':
+      unsigned_p = TREE_UNSIGNED (type);
+      switch (mode)
+	{
+	  case SImode:
+	    result = (unsigned_p ? unsigned_V4SI_type_node : V4SI_type_node);
+	    break;
+	  case HImode:
+	    result = (unsigned_p ? unsigned_V8HI_type_node : V8HI_type_node);
+	    break;
+	  case QImode:
+	    result = (unsigned_p ? unsigned_V16QI_type_node : V16QI_type_node);
+	    break;
+	  case SFmode: result = V4SF_type_node; break;
+	    /* If the user says 'vector int bool', we may be handed the 'bool'
+	       attribute _before_ the 'vector' attribute, and so select the proper
+	       type in the 'b' case below.  */
+	  case V4SImode: case V8HImode: case V16QImode: result = type;
+	  default: break;
+	}
+      break;
+    case 'b':
+      switch (mode)
+	{
+	  case SImode: case V4SImode: result = bool_V4SI_type_node; break;
+	  case HImode: case V8HImode: result = bool_V8HI_type_node; break;
+	  case QImode: case V16QImode: result = bool_V16QI_type_node;
+	  default: break;
+	}
+      break;
+    case 'p':
+      switch (mode)
+	{
+	  case V8HImode: result = pixel_V8HI_type_node;
+	  default: break;
+	}
+    default: break;
+    }
+
+  *no_add_attrs = true;  /* No need to hang on to the attribute.  */
+
+  if (!result)
+    warning ("`%s' attribute ignored", IDENTIFIER_POINTER (name));
+  else
+    *node = reconstruct_complex_type (*node, result);
+
+  return NULL_TREE;
+}
+
 /* Handle a "longcall" or "shortcall" attribute; arguments as in
    struct attribute_spec.handler.  */
 

gcc/config/rs6000/rs6000.h

@@ -452,6 +452,9 @@ enum group_termination
    {"longcall", &rs6000_longcall_switch,				\
     N_("Avoid all range limits on call instructions"), 0},		\
    {"no-longcall", &rs6000_longcall_switch, "", 0},			\
+   {"warn-altivec-long", &rs6000_warn_altivec_long_switch, \
+    N_("Warn about deprecated 'vector long ...' AltiVec type usage"), 0}, \
+   {"no-warn-altivec-long", &rs6000_warn_altivec_long_switch, "", 0}, \
    {"sched-costly-dep=", &rs6000_sched_costly_dep_str,                  \
     N_("Determine which dependences between insns are considered costly"), 0}, \
    {"insert-sched-nops=", &rs6000_sched_insert_nops_str,                \
@@ -520,6 +523,9 @@ extern enum rs6000_dependence_cost rs6000_sched_costly_dep;
 extern const char *rs6000_sched_insert_nops_str;
 extern enum rs6000_nop_insertion rs6000_sched_insert_nops;
 
+extern int rs6000_warn_altivec_long;
+extern const char *rs6000_warn_altivec_long_switch;
+
 /* Alignment options for fields in structures for sub-targets following
    AIX-like ABI.
    ALIGN_POWER word-aligns FP doubles (default AIX ABI).
@@ -2911,9 +2917,11 @@ enum rs6000_builtins
   ALTIVEC_BUILTIN_ABS_V4SI,
   ALTIVEC_BUILTIN_ABS_V4SF,
   ALTIVEC_BUILTIN_ABS_V8HI,
-  ALTIVEC_BUILTIN_ABS_V16QI
+  ALTIVEC_BUILTIN_ABS_V16QI,
+  ALTIVEC_BUILTIN_COMPILETIME_ERROR,
+
   /* SPE builtins.  */
-  , SPE_BUILTIN_EVADDW,
+  SPE_BUILTIN_EVADDW,
   SPE_BUILTIN_EVAND,
   SPE_BUILTIN_EVANDC,
   SPE_BUILTIN_EVDIVWS,

gcc/testsuite/ChangeLog

@@ -1,3 +1,21 @@
+2004-02-21  Ziemowit Laski  <zlaski@apple.com>
+
+	* g++.dg/ext/altivec-1.C: Generalize target triple.
+	* g++.dg/ext/altivec-2.C: New test case.
+	* g++.dg/ext/altivec_check.h: New file.
+	* gcc.dg/altivec-1.c: Generalize target triple;
+	include altivec_check.h and call altivec_check().
+	* gcc.dg/altivec-[2-5].c: Generalize target triple.
+	* gcc.dg/altivec-6.c: New test case.
+	* gcc.dg/altivec-[7-9].c: Generalize target triple; add
+	type casts as needed.
+	* gcc.dg/altivec-10.c: Include altivec_check.h and call 
+	altivec_check().
+	* gcc.dg/altivec-12.c: New test case.
+	* gcc.dg/altivec-varargs-1.c: Generalize target triple;
+	include altivec_check.h and call altivec_check().
+	* gcc.dg/altivec_check.h: New file.
+
 2004-02-20  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
 	* lib/target-supports.exp (check_alias_available): Don't mangle

gcc/testsuite/g++.dg/ext/altivec-1.C

@@ -1,4 +1,4 @@
-// { dg-do compile { target powerpc-*-* } } */
+/* { dg-do compile { target powerpc*-*-* } } */
 /* { dg-options "-maltivec" } */
 
 #include <altivec.h>

gcc/testsuite/g++.dg/ext/altivec-2.C

@@ -0,0 +1,25 @@
+/* { dg-do run { target powerpc*-*-* } } */
+/* { dg-options "-maltivec -Wall" } */
+
+/* This test checks if AltiVec builtins accept const-qualified
+   arguments.  */
+
+#include <altivec.h>
+#include "altivec_check.h"
+
+int main (int argc, const char * argv[])
+{
+  int i;
+  const float cf = 1.0;
+  vector float v;
+  const vector float cv = (vector float){1.0, 2.0, 3.0, 4.0};
+
+  altivec_check ();
+
+  vec_dst(&cv, i, 0);
+  v = vec_ld(0, &cv);	
+  v = vec_lde(0, &cf);
+  vec_lvsl(0, &cf);
+  
+  return 0;
+}

gcc/testsuite/g++.dg/ext/altivec_check.h

@@ -0,0 +1,23 @@
+/* A runtime check for AltiVec capability.  */
+/* Contributed by Ziemowit Laski  <zlaski@apple.com>  */
+
+#include <signal.h>
+extern void exit(int);
+
+void 
+sig_ill_handler (int sig)
+{
+    exit (0);
+}
+
+void altivec_check(void) {
+
+  /* Exit on systems without AltiVec.  */
+  signal (SIGILL, sig_ill_handler);
+#ifdef __MACH__
+  asm volatile ("vor v0,v0,v0");
+#else
+  asm volatile ("vor 0,0,0");
+#endif
+  signal (SIGILL, SIG_DFL);
+}

gcc/testsuite/gcc.dg/altivec-1.c

@@ -1,9 +1,10 @@
-/* { dg-do run { target powerpc-*-*altivec powerpc-*-*-*altivec } } */
+/* { dg-do run { target powerpc*-*-* } } */
 /* { dg-options "-maltivec" } */
 
 /* Program to test PowerPC AltiVec instructions.  */
 
 #include <altivec.h>
+#include "altivec_check.h"
 
 extern void abort (void);
 
@@ -22,6 +23,8 @@ vector float f, g, h;
 
 int main ()
 {
+  altivec_check();  /* Exits if AltiVec not supported */
+
   k = vec_add (a1, a2);
   if (!vec_all_eq (addi, k))
     abort ();

gcc/testsuite/gcc.dg/altivec-10.c

@@ -4,11 +4,7 @@
 #include <altivec.h>
 #include <signal.h>
 
-void 
+#include "altivec_check.h"
-sig_ill_handler (int sig)
-{
-    exit(0);
-}
 
 typedef union
 {
@@ -62,7 +58,7 @@ check_cmple()
 {
   vector float a = {1.0, 2.0, 3.0, 4.0};
   vector float b = {1.0, 3.0, 2.0, 5.0};
-  vector signed int aux;
+  vector bool int aux;
   vector signed int le = {-1, -1, 0, -1};
 
   aux = vec_cmple (a, b);
@@ -75,10 +71,7 @@ check_cmple()
 int 
 main()
 {
-  /* Exit on systems without altivec.  */
+  altivec_check ();
-  signal (SIGILL, sig_ill_handler);
-  asm volatile ("vor 0,0,0");
-  signal (SIGILL, SIG_DFL);
 
   check_cmple ();
   check_vec_all_num ();

gcc/testsuite/gcc.dg/altivec-12.c

@@ -0,0 +1,94 @@
+/* { dg-do run { target powerpc*-*-darwin* } } */
+/* { dg-options "-faltivec" } */
+
+/* Program to test PowerPC AltiVec instructions.  */
+
+#include "altivec_check.h"
+
+extern void abort (void);
+#define CHECK_IF(E) if(!(E)) abort()
+
+vector int a1 = (vector int){ 100, 200, 300, 400 };
+vector int a2 = (vector int){ 500, 600, 700, 800 };
+vector int addi = (vector int){ 600, 800, 1000, 1200 };
+vector int avgi = (vector int){ 300, 400, 500, 600 };
+
+vector float f1 = (vector float){ 1.0, 2.0, 3.0, 4.0 };
+vector float f2 = (vector float){ 5.0, 6.0, 7.0, 8.0 };
+vector float f3;
+vector float addf1 = (vector float){ 6.0, 8.0, 10.0, 12.0 };
+vector float addf2 = (vector float){ 6.1, 8.1, 10.1, 12.1 };
+vector float addf3 = (vector float){ 6.0, 8.0, 9.9, 12.1 };
+vector int k;
+vector float f, g, h;
+
+int main ()
+{
+
+  altivec_check();  /* Exit if AltiVec not available.  */
+
+  k = vec_add (a1, a2);
+  CHECK_IF (vec_all_eq (addi, k));
+  CHECK_IF (vec_all_ge (addi, k));
+  CHECK_IF (vec_all_le (addi, k));
+  CHECK_IF (vec_any_eq (addi, k));
+  CHECK_IF (vec_any_ge (addi, k));
+  CHECK_IF (vec_any_le (addi, k));
+  CHECK_IF (!vec_any_ne (addi, k));
+  CHECK_IF (!vec_any_lt (addi, k));
+  CHECK_IF (!vec_any_gt (addi, k));
+  CHECK_IF (!vec_any_ne (addi, k));
+  CHECK_IF (!vec_any_lt (addi, k));
+  CHECK_IF (!vec_any_gt (addi, k));
+
+  k = vec_avg (a1, a2);
+  CHECK_IF (vec_all_eq (k, avgi));
+
+  h = vec_add (f1, f2);
+  CHECK_IF (vec_all_eq (h, addf1));
+  CHECK_IF (vec_all_ge (h, addf1));
+  CHECK_IF (vec_all_le (h, addf1));
+  CHECK_IF (vec_any_eq (h, addf1));
+  CHECK_IF (vec_any_ge (h, addf1));
+  CHECK_IF (vec_any_le (h, addf1));
+  CHECK_IF (!vec_any_ne (h, addf1));
+  CHECK_IF (!vec_any_lt (h, addf1));
+  CHECK_IF (!vec_any_gt (h, addf1));
+  CHECK_IF (!vec_any_ne (h, addf1));
+  CHECK_IF (!vec_any_lt (h, addf1));
+  CHECK_IF (!vec_any_gt (h, addf1));
+
+  CHECK_IF (vec_all_gt (addf2, addf1));
+  CHECK_IF (vec_any_gt (addf2, addf1));
+  CHECK_IF (vec_all_ge (addf2, addf1));
+  CHECK_IF (vec_any_ge (addf2, addf1));
+  CHECK_IF (vec_all_ne (addf2, addf1));
+  CHECK_IF (vec_any_ne (addf2, addf1));
+  CHECK_IF (!vec_all_lt (addf2, addf1));
+  CHECK_IF (!vec_any_lt (addf2, addf1));
+  CHECK_IF (!vec_all_le (addf2, addf1));
+  CHECK_IF (!vec_any_le (addf2, addf1));
+  CHECK_IF (!vec_all_eq (addf2, addf1));
+  CHECK_IF (!vec_any_eq (addf2, addf1));
+
+  CHECK_IF (vec_any_eq (addf3, addf1));
+  CHECK_IF (vec_any_ne (addf3, addf1));
+  CHECK_IF (vec_any_lt (addf3, addf1));
+  CHECK_IF (vec_any_le (addf3, addf1));
+  CHECK_IF (vec_any_gt (addf3, addf1));
+  CHECK_IF (vec_any_ge (addf3, addf1));
+  CHECK_IF (!vec_all_eq (addf3, addf1));
+  CHECK_IF (!vec_all_ne (addf3, addf1));
+  CHECK_IF (!vec_all_lt (addf3, addf1));
+  CHECK_IF (!vec_all_le (addf3, addf1));
+  CHECK_IF (!vec_all_gt (addf3, addf1));
+  CHECK_IF (!vec_all_ge (addf3, addf1));
+
+  CHECK_IF (vec_all_numeric (addf3));
+  CHECK_IF (vec_all_in (addf1, addf2));
+
+  CHECK_IF (vec_step (vector bool char) == 16);
+  CHECK_IF (vec_step (addf3) == 4);
+
+  return 0;
+}

gcc/testsuite/gcc.dg/altivec-2.c

@@ -1,4 +1,4 @@
-/* { dg-do compile { target powerpc-*-* } } */
+/* { dg-do compile { target powerpc*-*-* } } */
 /* { dg-options "-maltivec" } */
 
 /* Program to test the vector_size attribute.  This needs to run on a

gcc/testsuite/gcc.dg/altivec-3.c

@@ -1,6 +1,8 @@
-/* { dg-do run { target powerpc-*-*altivec powerpc-*-*-*altivec } } */
+/* { dg-do run { target powerpc*-*-* } } */
 /* { dg-options "-maltivec" } */
 
+#include "altivec_check.h"
+
 typedef int int4 __attribute__ ((mode(V4SI)));
 typedef float float4 __attribute__ ((mode(V4SF)));
 
@@ -55,6 +57,8 @@ main ()
   float4 f3 = (float4) { 6.0, 8.0, 10.0, 12.0 };
   float4 ftmp;
 
+  altivec_check ();
+
   vec_store (i3, a3);
   itmp = vec_add_int4 (a1, a2);
   vec_store (j3, itmp);

gcc/testsuite/gcc.dg/altivec-4.c

@@ -1,4 +1,4 @@
-/* { dg-do compile { target powerpc-*-* } } */
+/* { dg-do compile { target powerpc*-*-* } } */
 /* { dg-options "-maltivec -O0 -Wall" } */
 
 #define vector __attribute__((vector_size(16)))

gcc/testsuite/gcc.dg/altivec-5.c

@@ -1,4 +1,4 @@
-/* { dg-do compile { target powerpc-*-* } } */
+/* { dg-do compile { target powerpc*-*-* } } */
 /* { dg-options "-maltivec -O2" } */
 
 #define vector __attribute__((vector_size(16)))

gcc/testsuite/gcc.dg/altivec-6.c

@@ -0,0 +1,64 @@
+/* { dg-do compile { target powerpc-*-darwin* } } */
+/* { dg-options "-faltivec -O0 -Wall" } */
+
+
+/* These denote "generic" GCC vectors.  */
+static int __attribute__((mode(V4SI))) x, y;
+
+static vector signed int i,j;
+static vector signed short s,t;
+static vector signed char c,d;
+static vector float f,g;
+
+static vector unsigned char uc;
+
+static vector signed int *pi;
+
+static int int1, int2;
+
+void
+b()
+{
+  vec_add (x, y);
+
+  /* Make sure the predicates accept correct argument types.  */
+
+  int1 = vec_all_in (f, g);
+  int1 = vec_all_ge (f, g);
+  int1 = vec_all_eq (c, d);
+  int1 = vec_all_ne (s, t);
+  int1 = vec_any_eq (i, j);
+  int1 = vec_any_ge (f, g);
+  int1 = vec_all_ngt (f, g);
+  int1 = vec_any_ge (c, d);
+  int1 = vec_any_ge (s, t);
+  int1 = vec_any_ge (i, j);
+  int1 = vec_any_ge (c, d);
+  int1 = vec_any_ge (s, t);
+  int1 = vec_any_ge (i, j);
+
+  vec_mtvscr (i);
+  vec_dssall ();
+  s = (vector signed short) vec_mfvscr ();
+  vec_dss (3);
+
+  vec_dst (pi, int1 + int2, 3);
+  vec_dstst (pi, int1 + int2, 3);
+  vec_dststt (pi, int1 + int2, 3);
+  vec_dstt (pi, int1 + int2, 3);
+
+  uc = (vector unsigned char) vec_lvsl (int1 + 69, (signed int *) pi);
+  uc = (vector unsigned char) vec_lvsr (int1 + 69, (signed int *) pi);
+
+  c = vec_lde (int1, (signed char *) pi);
+  s = vec_lde (int1, (signed short *) pi);
+  i = vec_lde (int1, (signed int *) pi);
+  i = vec_ldl (int1, pi);
+  i = vec_ld (int1, pi);
+
+  vec_st (i, int2, pi);
+  vec_ste (c, int2, (signed char *) pi);
+  vec_ste (s, int2, (signed short *) pi);
+  vec_ste (i, int2, (signed int *) pi);
+  vec_stl (i, int2, pi);
+}

gcc/testsuite/gcc.dg/altivec-7.c

@@ -1,6 +1,6 @@
 /* Origin: Aldy Hernandez  <aldyh@redhat.com>  */
 
-/* { dg-do compile { target powerpc-*-* } } */
+/* { dg-do compile { target powerpc*-*-* } } */
 /* { dg-options "-maltivec" } */
 
 #include <altivec.h>
@@ -10,19 +10,19 @@ int *var_int;
 unsigned long **ulongp;
 vector pixel *varpixel;
 vector signed char *vecchar;
-vector signed long *vecint;
+vector signed long *vecint;       /* { dg-warning "use of .long. in AltiVec types is deprecated; use .int." } */
 vector signed short *vecshort;
 vector unsigned char *vecuchar;
-vector unsigned long *vecuint;
+vector unsigned long *vecuint;    /* { dg-warning "use of .long. in AltiVec types is deprecated; use .int." } */
 vector unsigned short *vecushort;
 vector float *vecfloat;
 
 int main ()
 {
-  *vecfloat++ = vec_andc(vecint[0], vecfloat[1]);
+  *vecfloat++ = vec_andc((vector bool int)vecint[0], vecfloat[1]);
-  *vecfloat++ = vec_andc(vecfloat[0], vecint[1]);
+  *vecfloat++ = vec_andc(vecfloat[0], (vector bool int)vecint[1]);
-  *vecfloat++ = vec_vxor(vecint[0], vecfloat[1]);
+  *vecfloat++ = vec_vxor((vector bool int)vecint[0], vecfloat[1]);
-  *vecfloat++ = vec_vxor(vecfloat[0], vecint[1]);
+  *vecfloat++ = vec_vxor(vecfloat[0], (vector bool int)vecint[1]);
   *varpixel++ = vec_packpx(vecuint[0], vecuint[1]);
   *varpixel++ = vec_vpkpx(vecuint[0], vecuint[1]);
   *vecshort++ = vec_vmulosb(vecchar[0], vecchar[1]);
@@ -32,14 +32,14 @@ int main ()
   *vecint++ = vec_lvewx(var_int[0], longp[1]);
   *vecint++ = vec_unpackh(vecshort[0]);
   *vecint++ = vec_unpackl(vecshort[0]);
-  *vecushort++ = vec_andc(vecshort[0], vecushort[1]);
+  *vecushort++ = vec_andc((vector bool short)vecshort[0], vecushort[1]);
-  *vecushort++ = vec_andc(vecushort[0], vecshort[1]);
+  *vecushort++ = vec_andc(vecushort[0], (vector bool short)vecshort[1]);
-  *vecushort++ = vec_vxor(vecshort[0], vecushort[1]);
+  *vecushort++ = vec_vxor((vector bool short)vecshort[0], vecushort[1]);
-  *vecushort++ = vec_vxor(vecushort[0], vecshort[1]);
+  *vecushort++ = vec_vxor(vecushort[0], (vector bool short)vecshort[1]);
   *vecuint++ = vec_ld(var_int[0], ulongp[1]);
   *vecuint++ = vec_lvx(var_int[0], ulongp[1]);
   *vecuint++ = vec_vmsumubm(vecuchar[0], vecuchar[1], vecuint[2]);
-  *vecuchar++ = vec_xor(vecuchar[0], vecchar[1]);
+  *vecuchar++ = vec_xor(vecuchar[0], (vector unsigned char)vecchar[1]);
 
   return 0;
 }

gcc/testsuite/gcc.dg/altivec-8.c

@@ -1,7 +1,7 @@
 /* Origin: Aldy Hernandez  <aldyh@redhat.com>  */
 /* Test rs6000_legitimate_address.  PRE_INC should be invalid.  */
 
-/* { dg-do compile { target powerpc-*-* } } */
+/* { dg-do compile { target powerpc*-*-* } } */
 /* { dg-options "-maltivec" } */
 
 #include <altivec.h>

gcc/testsuite/gcc.dg/altivec-9.c

@@ -1,4 +1,4 @@
-/* { dg-do compile { target powerpc-*-* } } */
+/* { dg-do compile { target powerpc*-*-* } } */
 /* { dg-options "-maltivec -mabi=altivec -g" } */
 
 /* PR9564 */

gcc/testsuite/gcc.dg/altivec-varargs-1.c

@@ -1,9 +1,11 @@
-/* { dg-do run { target powerpc*-*-darwin* powerpc*-*-*altivec* powerpc*-*-linux*} } */
+/* { dg-do run { target powerpc*-*-* } } */
 /* { dg-options "-maltivec -mabi=altivec -fno-inline" } */
 
 #include <stdarg.h>
 #include <signal.h>
 
+#include "altivec_check.h"
+
 #define vector __attribute__((mode(V4SI)))
 
 const vector unsigned int v1 = {10,11,12,13};
@@ -72,19 +74,10 @@ int main1(void)
   return 0;
 }
 
-void 
-sig_ill_handler (int sig)
-{
-    exit(0);
-}
-
 int main (void)
 {
-  /* Exit on systems without altivec.  */
+  /* Exit on systems without AltiVec.  */
-  signal (SIGILL, sig_ill_handler);
+  altivec_check ();
-  /* Altivec instruction, 'vor %v0,%v0,%v0'.  */
-  asm volatile (".long 0x10000484");
-  signal (SIGILL, SIG_DFL);
 
   return main1 ();
 }

gcc/testsuite/gcc.dg/altivec_check.h

@@ -0,0 +1,23 @@
+/* A runtime check for AltiVec capability.  */
+/* Contributed by Ziemowit Laski  <zlaski@apple.com>  */
+
+#include <signal.h>
+extern void exit (int);
+
+void 
+sig_ill_handler (int sig)
+{
+    exit (0);
+}
+
+void altivec_check(void) {
+
+  /* Exit on systems without AltiVec.  */
+  signal (SIGILL, sig_ill_handler);
+#ifdef __MACH__
+  asm volatile ("vor v0,v0,v0");
+#else
+  asm volatile ("vor 0,0,0");
+#endif
+  signal (SIGILL, SIG_DFL);
+}

libf2c/libI77/config.h.in

@@ -1,4 +1,4 @@
-/* config.h.in.  Generated automatically from configure.in by autoheader 2.13.  */
+/* config.h.in.  Generated automatically from configure.in by autoheader.  */
 
 /* Define to empty if the keyword does not work.  */
 #undef const

libf2c/libU77/config.hin

@@ -1,4 +1,4 @@
-/* config.hin.  Generated automatically from configure.in by autoheader 2.13.  */
+/* config.hin.  Generated automatically from configure.in by autoheader.  */
 
 /* Define to empty if the keyword does not work.  */
 #undef const