mirror of git://gcc.gnu.org/git/gcc.git
i386.md (*lea<mode>_general_1): Rename from *lea_general_1.
* config/i386/i386.md (*lea<mode>_general_1): Rename from *lea_general_1. Use explicit SWI12 mode interator. (*lea<mode>_general_2): Rename from *lea_general_2. Use explicit SWI12 mode interator. (*lea<mode>_general_3): Rename from *lea_general_3. Use explicit SWI12 mode interator. (*lea<SWI12:mode>_general_4): Split from *lea_general_4. Use explicit SWI12 mode interator. (*lea<SWI48:mode>_general_4): Split from *lea_general_4. Use explicit SWI48 mode interator. From-SVN: r235286
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2016-04-20 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.md (*lea<mode>_general_1): Rename from
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*lea_general_1. Use explicit SWI12 mode interator.
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(*lea<mode>_general_2): Rename from *lea_general_2.
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Use explicit SWI12 mode interator.
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(*lea<mode>_general_3): Rename from *lea_general_3.
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Use explicit SWI12 mode interator.
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(*lea<SWI12:mode>_general_4): Split from *lea_general_4.
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Use explicit SWI12 mode interator.
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(*lea<SWI48:mode>_general_4): Split from *lea_general_4.
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Use explicit SWI48 mode interator.
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2016-04-20 H.J. Lu <hongjiu.lu@intel.com>
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* config/i386/i386.c (ix86_avx256_split_vector_move_misalign):
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@ -6206,144 +6206,119 @@
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;; The lea patterns for modes less than 32 bits need to be matched by
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;; several insns converted to real lea by splitters.
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(define_insn_and_split "*lea_general_1"
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[(set (match_operand 0 "register_operand" "=r")
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(plus (plus (match_operand 1 "index_register_operand" "l")
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(match_operand 2 "register_operand" "r"))
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(match_operand 3 "immediate_operand" "i")))]
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"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode)
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&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
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&& GET_MODE (operands[0]) == GET_MODE (operands[1])
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&& GET_MODE (operands[0]) == GET_MODE (operands[2])
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&& (GET_MODE (operands[0]) == GET_MODE (operands[3])
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|| GET_MODE (operands[3]) == VOIDmode)"
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(define_insn_and_split "*lea<mode>_general_1"
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[(set (match_operand:SWI12 0 "register_operand" "=r")
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(plus:SWI12
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(plus:SWI12 (match_operand:SWI12 1 "index_register_operand" "l")
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(match_operand:SWI12 2 "register_operand" "r"))
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(match_operand:SWI12 3 "immediate_operand" "i")))]
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"!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
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"#"
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"&& reload_completed"
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[(const_int 0)]
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[(set (match_dup 0)
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(plus:SI
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(plus:SI (match_dup 1) (match_dup 2))
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(match_dup 3)))]
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{
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machine_mode mode = SImode;
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rtx pat;
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operands[0] = gen_lowpart (mode, operands[0]);
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operands[1] = gen_lowpart (mode, operands[1]);
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operands[2] = gen_lowpart (mode, operands[2]);
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operands[3] = gen_lowpart (mode, operands[3]);
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pat = gen_rtx_PLUS (mode, gen_rtx_PLUS (mode, operands[1], operands[2]),
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operands[3]);
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emit_insn (gen_rtx_SET (operands[0], pat));
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DONE;
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operands[0] = gen_lowpart (SImode, operands[0]);
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operands[1] = gen_lowpart (SImode, operands[1]);
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operands[2] = gen_lowpart (SImode, operands[2]);
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operands[3] = gen_lowpart (SImode, operands[3]);
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}
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[(set_attr "type" "lea")
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(set_attr "mode" "SI")])
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(define_insn_and_split "*lea_general_2"
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[(set (match_operand 0 "register_operand" "=r")
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(plus (mult (match_operand 1 "index_register_operand" "l")
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(match_operand 2 "const248_operand" "n"))
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(match_operand 3 "nonmemory_operand" "ri")))]
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"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode)
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&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
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&& GET_MODE (operands[0]) == GET_MODE (operands[1])
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&& (GET_MODE (operands[0]) == GET_MODE (operands[3])
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|| GET_MODE (operands[3]) == VOIDmode)"
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(define_insn_and_split "*lea<mode>_general_2"
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[(set (match_operand:SWI12 0 "register_operand" "=r")
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(plus:SWI12
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(mult:SWI12 (match_operand:SWI12 1 "index_register_operand" "l")
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(match_operand:SWI12 2 "const248_operand" "n"))
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(match_operand:SWI12 3 "nonmemory_operand" "ri")))]
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"!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
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"#"
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"&& reload_completed"
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[(const_int 0)]
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[(set (match_dup 0)
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(plus:SI
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(mult:SI (match_dup 1) (match_dup 2))
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(match_dup 3)))]
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{
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machine_mode mode = SImode;
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rtx pat;
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operands[0] = gen_lowpart (mode, operands[0]);
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operands[1] = gen_lowpart (mode, operands[1]);
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operands[3] = gen_lowpart (mode, operands[3]);
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pat = gen_rtx_PLUS (mode, gen_rtx_MULT (mode, operands[1], operands[2]),
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operands[3]);
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emit_insn (gen_rtx_SET (operands[0], pat));
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DONE;
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operands[0] = gen_lowpart (SImode, operands[0]);
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operands[1] = gen_lowpart (SImode, operands[1]);
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operands[3] = gen_lowpart (SImode, operands[3]);
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}
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[(set_attr "type" "lea")
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(set_attr "mode" "SI")])
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(define_insn_and_split "*lea_general_3"
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[(set (match_operand 0 "register_operand" "=r")
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(plus (plus (mult (match_operand 1 "index_register_operand" "l")
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(match_operand 2 "const248_operand" "n"))
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(match_operand 3 "register_operand" "r"))
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(match_operand 4 "immediate_operand" "i")))]
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"(GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode)
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&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
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&& GET_MODE (operands[0]) == GET_MODE (operands[1])
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&& GET_MODE (operands[0]) == GET_MODE (operands[3])"
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(define_insn_and_split "*lea<mode>_general_3"
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[(set (match_operand:SWI12 0 "register_operand" "=r")
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(plus:SWI12
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(plus:SWI12
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(mult:SWI12 (match_operand:SWI12 1 "index_register_operand" "l")
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(match_operand:SWI12 2 "const248_operand" "n"))
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(match_operand:SWI12 3 "register_operand" "r"))
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(match_operand:SWI12 4 "immediate_operand" "i")))]
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"!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)"
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"#"
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"&& reload_completed"
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[(const_int 0)]
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[(set (match_dup 0)
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(plus:SI
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(plus:SI
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(mult:SI (match_dup 1) (match_dup 2))
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(match_dup 3))
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(match_dup 4)))]
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{
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machine_mode mode = SImode;
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rtx pat;
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operands[0] = gen_lowpart (mode, operands[0]);
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operands[1] = gen_lowpart (mode, operands[1]);
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operands[3] = gen_lowpart (mode, operands[3]);
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operands[4] = gen_lowpart (mode, operands[4]);
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pat = gen_rtx_PLUS (mode,
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gen_rtx_PLUS (mode,
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gen_rtx_MULT (mode, operands[1],
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operands[2]),
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operands[3]),
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operands[4]);
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emit_insn (gen_rtx_SET (operands[0], pat));
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DONE;
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operands[0] = gen_lowpart (SImode, operands[0]);
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operands[1] = gen_lowpart (SImode, operands[1]);
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operands[3] = gen_lowpart (SImode, operands[3]);
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operands[4] = gen_lowpart (SImode, operands[4]);
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}
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[(set_attr "type" "lea")
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(set_attr "mode" "SI")])
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(define_insn_and_split "*lea_general_4"
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[(set (match_operand 0 "register_operand" "=r")
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(any_or (ashift
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(match_operand 1 "index_register_operand" "l")
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(match_operand 2 "const_int_operand" "n"))
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(match_operand 3 "const_int_operand" "n")))]
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"(((GET_MODE (operands[0]) == QImode || GET_MODE (operands[0]) == HImode)
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&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun)))
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|| GET_MODE (operands[0]) == SImode
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|| (TARGET_64BIT && GET_MODE (operands[0]) == DImode))
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&& GET_MODE (operands[0]) == GET_MODE (operands[1])
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&& ((unsigned HOST_WIDE_INT) INTVAL (operands[2])) - 1 < 3
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(define_insn_and_split "*lea<mode>_general_4"
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[(set (match_operand:SWI12 0 "register_operand" "=r")
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(any_or:SWI12
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(ashift:SWI12
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(match_operand:SWI12 1 "index_register_operand" "l")
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(match_operand:SWI12 2 "const_int_operand" "n"))
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(match_operand:SWI12 3 "const_int_operand" "n")))]
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"(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
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&& (unsigned HOST_WIDE_INT) INTVAL (operands[2]) <= 3
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&& ((unsigned HOST_WIDE_INT) INTVAL (operands[3])
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< (HOST_WIDE_INT_1U << INTVAL (operands[2])))"
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"#"
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"&& reload_completed"
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[(const_int 0)]
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[(set (match_dup 0)
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(plus:SI
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(mult:SI (match_dup 1) (match_dup 2))
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(match_dup 3)))]
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{
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machine_mode mode = GET_MODE (operands[0]);
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rtx pat;
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if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode))
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{
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mode = SImode;
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operands[0] = gen_lowpart (mode, operands[0]);
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operands[1] = gen_lowpart (mode, operands[1]);
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}
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operands[0] = gen_lowpart (SImode, operands[0]);
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operands[1] = gen_lowpart (SImode, operands[1]);
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operands[2] = GEN_INT (1 << INTVAL (operands[2]));
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pat = plus_constant (mode, gen_rtx_MULT (mode, operands[1], operands[2]),
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INTVAL (operands[3]));
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emit_insn (gen_rtx_SET (operands[0], pat));
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DONE;
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}
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[(set_attr "type" "lea")
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(set (attr "mode")
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(if_then_else (match_operand:DI 0)
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(const_string "DI")
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(const_string "SI")))])
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(set_attr "mode" "SI")])
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(define_insn_and_split "*lea<mode>_general_4"
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[(set (match_operand:SWI48 0 "register_operand" "=r")
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(any_or:SWI48
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(ashift:SWI48
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(match_operand:SWI48 1 "index_register_operand" "l")
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(match_operand:SWI48 2 "const_int_operand" "n"))
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(match_operand:SWI48 3 "const_int_operand" "n")))]
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"(unsigned HOST_WIDE_INT) INTVAL (operands[2]) <= 3
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&& ((unsigned HOST_WIDE_INT) INTVAL (operands[3])
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< (HOST_WIDE_INT_1U << INTVAL (operands[2])))"
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"#"
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"&& reload_completed"
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[(set (match_dup 0)
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(plus:SWI48
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(mult:SWI48 (match_dup 1) (match_dup 2))
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(match_dup 3)))]
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"operands[2] = GEN_INT (1 << INTVAL (operands[2]));"
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[(set_attr "type" "lea")
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(set_attr "mode" "<MODE>")])
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;; Subtract instructions
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