mirror of git://gcc.gnu.org/git/gcc.git
x86-tune.def (X86_TUNE_SLOW_IMUL_IMM32_MEM, [...]): Keep enabled only for K8 and AMDFAM10.
* config/i386/x86-tune.def (X86_TUNE_SLOW_IMUL_IMM32_MEM, X86_TUNE_SLOW_IMUL_IMM8): Keep enabled only for K8 and AMDFAM10. (X86_TUNE_USE_VECTOR_FP_CONVERTS): Disable for generic. From-SVN: r203876
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@ -1,3 +1,9 @@
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2013-10-20 Jan Hubicka <jh@suse.cz>
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* config/i386/x86-tune.def (X86_TUNE_SLOW_IMUL_IMM32_MEM,
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X86_TUNE_SLOW_IMUL_IMM8): Keep enabled only for K8 and AMDFAM10.
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(X86_TUNE_USE_VECTOR_FP_CONVERTS): Disable for generic.
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2013-10-20 Richard Sandiford <rdsandiford@googlemail.com>
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* config/mips/mips.h (ISA_HAS_WSBH): Define.
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@ -327,13 +327,13 @@ DEF_TUNE (X86_TUNE_PROMOTE_HIMODE_IMUL, "promote_himode_imul",
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vector path on AMD machines.
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FIXME: Do we need to enable this for core? */
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DEF_TUNE (X86_TUNE_SLOW_IMUL_IMM32_MEM, "slow_imul_imm32_mem",
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m_CORE_ALL | m_K8 | m_AMDFAM10 | m_BDVER | m_BTVER | m_GENERIC)
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m_K8 | m_AMDFAM10)
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/* X86_TUNE_SLOW_IMUL_IMM8: Imul of 8-bit constant is vector path on AMD
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machines.
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FIXME: Do we need to enable this for core? */
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DEF_TUNE (X86_TUNE_SLOW_IMUL_IMM8, "slow_imul_imm8",
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m_CORE_ALL | m_K8 | m_AMDFAM10 | m_BDVER | m_BTVER | m_GENERIC)
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m_K8 | m_AMDFAM10)
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/* X86_TUNE_MOVE_M1_VIA_OR: On pentiums, it is faster to load -1 via OR
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than a MOV. */
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@ -352,7 +352,7 @@ DEF_TUNE (X86_TUNE_NOT_VECTORMODE, "not_vectormode", m_K6)
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from FP to FP. This form of instructions avoids partial write to the
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destination. */
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DEF_TUNE (X86_TUNE_USE_VECTOR_FP_CONVERTS, "use_vector_fp_converts",
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m_AMDFAM10 | m_GENERIC)
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m_AMDFAM10)
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/* X86_TUNE_USE_VECTOR_CONVERTS: Prefer vector packed SSE conversion
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from integer to FP. */
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