mirror of git://gcc.gnu.org/git/gcc.git
re PR target/70123 (Miscompilation of cfitsio testcase on s390x-linux starting with r222144)
PR target/70123 * lra-remat.c (operand_to_remat): Disallow hard regs in the value t be rematerialized. (reg_overlap_for_remat_p): Renamed from input_regno_present_p. Arguments swapped. All callers changed. Take reg_renumber into account, and Calculate and compare register ranges for hard regs. PR target/70123 * gcc.dg/torture/pr70123.c: New test. From-SVN: r234152
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parent
cebde9e9eb
commit
92348f098d
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@ -1,3 +1,12 @@
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2016-03-11 Bernd Schmidt <bschmidt@redhat.com>
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PR target/70123
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* lra-remat.c (operand_to_remat): Disallow hard regs in the value t
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be rematerialized.
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(reg_overlap_for_remat_p): Renamed from input_regno_present_p.
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Arguments swapped. All callers changed. Take reg_renumber into
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account, and Calculate and compare register ranges for hard regs.
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2016-03-11 Jeff Law <law@redhat.com>
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PR tree-optimization/70190
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@ -413,6 +413,10 @@ operand_to_remat (rtx_insn *insn)
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if (reg->regno >= FIRST_PSEUDO_REGISTER
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&& bitmap_bit_p (&subreg_regs, reg->regno))
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return -1;
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/* Don't allow hard registers to be rematerialized. */
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if (reg->regno < FIRST_PSEUDO_REGISTER)
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return -1;
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}
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if (found_reg == NULL)
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return -1;
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@ -718,21 +722,46 @@ calculate_local_reg_remat_bb_data (void)
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/* Return true if REGNO is an input operand of INSN. */
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/* Return true if REG overlaps an input operand of INSN. */
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static bool
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input_regno_present_p (rtx_insn *insn, int regno)
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reg_overlap_for_remat_p (lra_insn_reg *reg, rtx_insn *insn)
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{
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int iter;
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lra_insn_recog_data_t id = lra_get_insn_recog_data (insn);
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struct lra_static_insn_data *static_id = id->insn_static_data;
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struct lra_insn_reg *reg;
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unsigned regno = reg->regno;
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int nregs;
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if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] >= 0)
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regno = reg_renumber[regno];
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if (regno >= FIRST_PSEUDO_REGISTER)
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nregs = 1;
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else
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nregs = hard_regno_nregs[regno][reg->biggest_mode];
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struct lra_insn_reg *reg2;
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for (iter = 0; iter < 2; iter++)
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for (reg = (iter == 0 ? id->regs : static_id->hard_regs);
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reg != NULL;
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reg = reg->next)
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if (reg->type == OP_IN && reg->regno == regno)
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for (reg2 = (iter == 0 ? id->regs : static_id->hard_regs);
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reg2 != NULL;
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reg2 = reg2->next)
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{
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if (reg2->type != OP_IN)
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continue;
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unsigned regno2 = reg2->regno;
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int nregs2;
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if (regno2 >= FIRST_PSEUDO_REGISTER && reg_renumber[regno2] >= 0)
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regno2 = reg_renumber[regno2];
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if (regno >= FIRST_PSEUDO_REGISTER)
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nregs2 = 1;
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else
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nregs2 = hard_regno_nregs[regno2][reg->biggest_mode];
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if ((regno2 + nregs2 - 1 >= regno && regno2 < regno + nregs)
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|| (regno + nregs - 1 >= regno2 && regno < regno2 + nregs2))
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return true;
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}
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return false;
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}
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@ -833,7 +862,7 @@ calculate_gen_cands (void)
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&& dst_regno == cand->regno)
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continue;
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if (cand->regno == reg->regno
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|| input_regno_present_p (insn2, reg->regno))
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|| reg_overlap_for_remat_p (reg, insn2))
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{
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bitmap_clear_bit (gen_cands, cand->index);
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bitmap_set_bit (&temp_bitmap, uid);
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@ -1219,7 +1248,7 @@ do_remat (void)
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&& dst_regno == cand->regno)
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continue;
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if (cand->regno == reg->regno
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|| input_regno_present_p (cand->insn, reg->regno))
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|| reg_overlap_for_remat_p (reg, cand->insn))
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bitmap_set_bit (&temp_bitmap, cand->index);
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}
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@ -1,3 +1,8 @@
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2016-03-11 Bernd Schmidt <bschmidt@redhat.com>
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PR target/70123
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* gcc.dg/torture/pr70123.c: New test.
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2016-03-11 Jeff Law <law@redhat.com>
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PR tree-optimization/70190
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@ -0,0 +1,198 @@
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/* { dg-do run } */
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/* { dg-options "-fPIC" { target fpic } } */
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__attribute__ ((noinline, noclone)) int
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bar (int flag, const char *__restrict format, ...)
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{
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asm volatile ("" : : "r" (flag), "r" (format) : "memory");
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return 0;
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}
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extern inline __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) int
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baz (const char *__restrict fmt, ...)
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{
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return bar (1, fmt, __builtin_va_arg_pack ());
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}
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__attribute__ ((noinline, noclone)) int
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f1 (void **a, const char *b, int *c)
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{
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*a = 0;
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*c = 0;
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asm volatile ("" : : "r" (&a), "r" (b), "r" (&c) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f2 (void *a, int b, int c, long d[], int *e)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d), "r" (e) : "memory");
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return 1;
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}
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__attribute__ ((noinline, noclone)) int
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f3 (void *a, int *b)
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{
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asm volatile ("" : : "r" (a), "r" (b) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f4 (void *a, const char *b, int c, int d, double *e, int f, char **g, int *h)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f), "r" (g), "r" (h) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f5 (void *a, long long b, int c, char **d, char **e, char **f, const char *g, long long h, int *i)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f), "r" (g), "r" (h) : "memory");
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asm volatile ("" : : "r" (i) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f6 (void *a, int b, int *c, int *d)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f7 (void *a, int b, long long c, long long d, long long e, double *f, int *g)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f), "r" (g) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f8 (void *a, int b, long long c, long long d, long long e, char *f, const char **g, int *h, int *i)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f), "r" (g), "r" (h) : "memory");
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asm volatile ("" : : "r" (i) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f9 (void *a, int b, long long c, long long d, long long e, char *f, int *g)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f), "r" (g) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f10 (void *a, int b, long long c, long long d, long long e, unsigned char f, unsigned char *g, int *h, int *i)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f), "r" (g), "r" (h) : "memory");
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asm volatile ("" : : "r" (i) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f11 (void *a, int b, long long c, long long d, long long e, long f, long *g, int *h, int *i)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f), "r" (g), "r" (h) : "memory");
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asm volatile ("" : : "r" (i) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f12 (void *a, int b, long long c, long long d, long long e, float f, float *g, int *h, int *i)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f), "r" (g), "r" (h) : "memory");
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asm volatile ("" : : "r" (i) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f13 (void *a, int b, long long c, long *d, long *e, int *f)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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asm volatile ("" : : "r" (e), "r" (f) : "memory");
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return 0;
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}
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__attribute__ ((noinline, noclone)) int
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f14 (void *a, int b, int *c, int *d)
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{
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asm volatile ("" : : "r" (a), "r" (b), "r" (c), "r" (d) : "memory");
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return 0;
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}
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volatile int a;
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int
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main ()
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{
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int b, c, d = 0, e, f = 0;
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long g, h;
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int j = 0;
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long k, l;
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int m;
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unsigned char n[21];
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long o[21];
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float p[21];
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double q[21];
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long r[3], s = 0;
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char t[42];
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char u[21];
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char *v[3];
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const char *w[21];
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double x[3] = { 15.1515151515151515, 16.1616161616161616, 17.1717171717171717 };
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char y[40], z[81];
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void *a2;
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char *b2[10], *c2[10], *d2[10];
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char e2[] = "abcdefghijklm";
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for (g = 0; g < 21; g++)
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w[g] = "";
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f1 (&a2, y, &b);
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if (b)
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goto lab;
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c = 32;
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if (f2 (a2, c, d, r, &b) > 0)
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__builtin_strcpy (z, "12345678901234567890123478901234567");
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if (f3 (a2, &b) > 0)
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goto lab;
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if (f4 (a2, "abcdefg", 1, j, x, 14, v, &b) > 0)
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goto lab;
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for (g = 0; g < a; g++)
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goto lab;
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f5 (a2, s, f, b2, c2, d2, e2, 0L, &b);
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if (f6 (a2, -1, &e, &b) > 0)
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goto lab;
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if (b > 0)
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goto lab;
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if (f6 (a2, 1, &e, &b) > 0)
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goto lab;
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f7 (a2, 8, g, 1, g, q, &b);
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for (g = 1; g <= 20; g++)
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{
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for (h = 0; h < g; h++)
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{
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t[h] = 0;
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q[h] = 0;
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}
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f8 (a2, 1, g, 1, 1, u, w, &m, &b);
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for (h = 0; h < g; h++)
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baz (" %2d", t[h]);
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baz (" %d\nX", b);
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f9 (a2, 3, g, 1, g, t, &b);
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for (h = 0; h < g; h++)
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baz (" %2d", t[h]);
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f10 (a2, 4, g, 1, g, 99, n, &m, &b);
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f11 (a2, 6, g, 1, g, 99, o, &m, &b);
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f12 (a2, 7, g, 1, g, 99., p, &m, &b);
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f13 (a2, 8, g, &k, &l, &b);
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}
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f14 (a2, 1, &e, &b);
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lab:
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return 0;
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}
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