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[arm] Rewrite t-aprofile using new selector methodology 

Now that the default FPU is 'auto' we can finally rewrite (and
simplify) the rules for mapping compiler options to multilibs.  We
no-longer need to know the specific CPU, since the driver will
construct a suitable -march flag for us; this greatly simplifies the
overall logic.  This patch rewrites the library list for A-profile
cores.  We use various Make extention rules to simplify the logic even
further.

A couple of minor tweaks to the configure script and to the main
driver ensures that we always know the setting of -mfloat-abi and
-marm/-mthumb.  Again, this helps simplify the logic further.  The
change to arm_target_thumb_only relies on the fact that this routine
is only called if neither -marm nor -mthumb has been previously
selected or specified by the user.

A new testsuite module is added to check the libraries generated.  The
new tests are only run if the compiler is configured with the relevant
multilibs enabled.

gcc:
	* config.gcc: (arm*-*-*): When building a-profile libraries, force
	the driver to pass through the default setting of -mfloat-abi.
	* common/config/arm/arm-common.c (arm_target_thumb_only): Return -marm
	rather than NULL.
	* config/arm/t-multilib (MULTILIB_REUSE): Initialize to empty.
	(all_feat_combs): New rule.
	(MULTILIB_OPTIONS): Use explicit ARM and Thumb directories.  Rework
	default libraries.
	* config/arm/t-aprofile: Rewrite.

gcc/testsuite:
	* gcc.target/arm/multilibs.exp: New file.

From-SVN: r249296
This commit is contained in:
Richard Earnshaw 2017-06-16 21:04:41 +00:00 committed by Richard Earnshaw
parent 1138961024
commit 93aa40fee6
7 changed files with 502 additions and 138 deletions
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12
gcc/ChangeLog
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@ -1,3 +1,15 @@
2017-06-16 Richard Earnshaw <rearnsha@arm.com>
* config.gcc: (arm*-*-*): When building a-profile libraries, force
the driver to pass through the default setting of -mfloat-abi.
* common/config/arm/arm-common.c (arm_target_thumb_only): Return -marm
rather than NULL.
* config/arm/t-multilib (MULTILIB_REUSE): Initialize to empty.
(all_feat_combs): New rule.
(MULTILIB_OPTIONS): Use explicit ARM and Thumb directories. Rework
default libraries.
* config/arm/t-aprofile: Rewrite.
2017-06-16 Richard Earnshaw <rearnsha@arm.com>
* config/arm/arm.h (FPUTYPE_AUTO): Define.

4
gcc/common/config/arm/arm-common.c
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@ -215,7 +215,9 @@ arm_target_thumb_only (int argc, const char **argv)
return "-mthumb";
}
return NULL;
/* Compiler hasn't been configured with a default, and the CPU
doesn't require Thumb, so default to ARM. */
return "-marm";
}
/* List the permitted CPU option names. If TARGET is a near miss for an

4
gcc/config.gcc
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@ -3856,7 +3856,9 @@ case "${target}" in
echo "Error: You cannot use any of --with-arch/cpu/fpu/float/mode with --with-multilib-list=${with_multilib_list}" 1>&2
exit 1
fi
# But pass the default value for float-abi
# through to the multilib selector
with_float="soft"
tmake_file="${tmake_file} ${tmake_profile_file}"
TM_MULTILIB_CONFIG="$with_multilib_list"
fi

187
gcc/config/arm/t-aprofile
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@ -24,145 +24,98 @@
# have their default values during the configure step. We enforce
# this during the top-level configury.
# Variables used later in this file.
v7_a_nosimd_variants := +fp +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +vfpv4-d16 +vfpv4
v7_a_simd_variants := +simd +neon-fp16 +neon-vfpv4
v7ve_nosimd_variants := +vfpv3-d16 +vfpv3 +vfpv3-d16-fp16 +vfpv3-fp16 +fp +vfpv4
v7ve_vfpv3_simd_variants := +neon +neon-fp16
v7ve_vfpv4_simd_variants := +simd
v8_a_nosimd_variants := +crc
v8_a_simd_variants := $(call all_feat_combs, simd crypto)
v8_1_a_simd_variants := $(call all_feat_combs, simd crypto)
v8_2_a_simd_variants := $(call all_feat_combs, simd fp16 crypto)
# Arch and FPU variants to build libraries with
MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7ve/march=armv8-a
MULTI_ARCH_DIRS_A = v7-a v7ve v8-a
MULTI_ARCH_OPTS_A = march=armv7-a/march=armv7-a+fp/march=armv7-a+simd/march=armv7ve+simd/march=armv8-a/march=armv8-a+simd
MULTI_ARCH_DIRS_A = v7-a v7-a+fp v7-a+simd v7ve+simd v8-a v8-a+simd
MULTI_FPU_OPTS_A = mfpu=vfpv3-d16/mfpu=neon/mfpu=vfpv4-d16/mfpu=neon-vfpv4/mfpu=neon-fp-armv8
MULTI_FPU_DIRS_A = fpv3 simdv1 fpv4 simdvfpv4 simdv8
# ARMv7-A - build nofp, fp-d16 and SIMD variants
MULTILIB_REQUIRED += mthumb/march=armv7-a/mfloat-abi=soft
MULTILIB_REQUIRED += mthumb/march=armv7-a+fp/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7-a+fp/mfloat-abi=softfp
MULTILIB_REQUIRED += mthumb/march=armv7-a+simd/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7-a+simd/mfloat-abi=softfp
# Option combinations to build library with
# Default CPU/Arch (ARM is implicitly included because it uses the default
# multilib)
MULTILIB_REQUIRED += mthumb
# ARMv7-A
MULTILIB_REQUIRED += *march=armv7-a
MULTILIB_REQUIRED += *march=armv7-a/mfpu=vfpv3-d16/mfloat-abi=*
MULTILIB_REQUIRED += *march=armv7-a/mfpu=neon/mfloat-abi=*
# ARMv7VE
MULTILIB_REQUIRED += *march=armv7ve
MULTILIB_REQUIRED += *march=armv7ve/mfpu=vfpv4-d16/mfloat-abi=*
MULTILIB_REQUIRED += *march=armv7ve/mfpu=neon-vfpv4/mfloat-abi=*
# ARMv8-A
MULTILIB_REQUIRED += *march=armv8-a
MULTILIB_REQUIRED += *march=armv8-a/mfpu=neon-fp-armv8/mfloat-abi=*
# ARMv7VE - only build a SIMD (+VFPv4) variant.
MULTILIB_REQUIRED += mthumb/march=armv7ve+simd/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv7ve+simd/mfloat-abi=softfp
# ARMv8-A - build nofp and SIMD variants.
MULTILIB_REQUIRED += mthumb/march=armv8-a/mfloat-abi=soft
MULTILIB_REQUIRED += mthumb/march=armv8-a+simd/mfloat-abi=hard
MULTILIB_REQUIRED += mthumb/march=armv8-a+simd/mfloat-abi=softfp
# Matches
# CPU Matches
MULTILIB_MATCHES += march?armv7-a=mcpu?marvell-pj4
MULTILIB_MATCHES += march?armv7-a=mcpu?generic-armv7-a
MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a8
MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a9
MULTILIB_MATCHES += march?armv7-a=mcpu?cortex-a5
MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a7
MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15
MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a12
MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17
MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a15.cortex-a7
MULTILIB_MATCHES += march?armv7ve=mcpu?cortex-a17.cortex-a7
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a32
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a35
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a53
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57.cortex-a53
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72.cortex-a53
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73.cortex-a35
MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73.cortex-a53
MULTILIB_MATCHES += march?armv8-a=mcpu?exynos-m1
MULTILIB_MATCHES += march?armv8-a=mcpu?xgene1
# Arch Matches
MULTILIB_MATCHES += march?armv8-a=march?armv8-a+crc
MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a
MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a+crc
MULTILIB_MATCHES += march?armv8-a=march?armv8.2-a
MULTILIB_MATCHES += march?armv8-a=march?armv8.2-a+fp16
# Map all v7-a FP variants to vfpv3-d16 (+fp)
MULTILIB_MATCHES += $(foreach ARCH, $(filter-out +fp, $(v7_a_nosimd_variants)), \
march?armv7-a+fp=march?armv7-a$(ARCH))
# FPU matches
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-fp16
MULTILIB_MATCHES += mfpu?vfpv3-d16=mfpu?vfpv3-d16-fp16
MULTILIB_MATCHES += mfpu?neon=mfpu?neon-fp16
MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?vfpv4
MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?fpv5-d16
MULTILIB_MATCHES += mfpu?vfpv4-d16=mfpu?fp-armv8
MULTILIB_MATCHES += mfpu?neon-fp-armv8=mfpu?crypto-neon-fp-armv8
MULTILIB_MATCHES += mfpu?vfp=mfpu?vfpv2
MULTILIB_MATCHES += mfpu?neon=mfpu?neon-vfpv3
# Map all v7-a SIMD variants to neon-vfpv3 (+simd)
MULTILIB_MATCHES += $(foreach ARCH, $(filter-out +simd, $(v7_a_simd_variants)), \
march?armv7-a+simd=march?armv7-a$(ARCH))
# Neither FP nor SIMD: map v7ve to v7-a
MULTILIB_MATCHES += march?armv7-a=march?armv7ve
# Map all requests for vfpv3 with a later CPU to vfpv3-d16 v7-a.
# So if new CPUs are added above at the newer architecture levels,
# do something to map them below here.
# We take the approach of mapping down to v7-a regardless of what
# the fp option is if the integer architecture brings things down.
# This applies to any similar combination at the v7ve and v8-a arch
# levels.
# ARMv7ve FP-only variants: map down to v7-a+fp
MULTILIB_MATCHES += $(foreach ARCH, $(v7ve_nosimd_variants), \
march?armv7-a+fp=march?armv7ve$(ARCH))
MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.hard
MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.softfp
MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard
MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp
MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard
MULTILIB_REUSE += march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.softfp
# ARMv7ve with SIMD, but SIMD is less capable than the default - map down to v7-a+simd
MULTILIB_MATCHES += $(foreach ARCH, $(v7ve_vfpv3_simd_variants), \
march?armv7-a+simd=march?armv7ve$(ARCH))
# ARMv8 without SIMD: map down to base architecture
MULTILIB_MATCHES += $(foreach ARCH, $(v8_a_nosimd_variants), \
march?armv8-a=march?armv8-a$(ARCH))
MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7ve/mfpu.neon/mfloat-abi.hard
MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7ve/mfpu.neon/mfloat-abi.softfp
MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv8-a/mfpu.neon/mfloat-abi.hard
MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv8-a/mfpu.neon/mfloat-abi.softfp
MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard
MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.softfp
MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.hard=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.hard
MULTILIB_REUSE += march.armv7-a/mfpu.neon/mfloat-abi.softfp=march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp
# ARMv8 with SIMD: map down to base arch + simd
MULTILIB_MATCHES += march?armv8-a+simd=march?armv8-a+crc+simd \
$(foreach ARCH, $(filter-out +simd, $(v8_a_simd_variants)), \
march?armv8-a+simd=march?armv8-a$(ARCH) \
march?armv8-a+simd=march?armv8-a+crc$(ARCH))
# Baseline v8.1-a: map down to baseline v8-a
MULTILIB_MATCHES += march?armv8-a=march?armv8.1-a
MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard
MULTILIB_REUSE += march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp
# Map all v8.1-a SIMD variants to v8-a+simd
MULTILIB_MATCHES += $(foreach ARCH, $(v8_1_a_simd_variants), \
march?armv8-a+simd=march?armv8.1-a$(ARCH))
# Baseline v8.2-a: map down to baseline v8-a
MULTILIB_MATCHES += march?armv8-a=march?armv8.2-a
MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard
MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp
MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.hard
MULTILIB_REUSE += march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.softfp
# Map all v8.2-a SIMD variants to v8-a+simd
MULTILIB_MATCHES += $(foreach ARCH, $(v8_2_a_simd_variants), \
march?armv8-a+simd=march?armv8.2-a$(ARCH))
# Use Thumb libraries for everything.
MULTILIB_REUSE += mthumb/march.armv7-a/mfloat-abi.soft=marm/march.armv7-a/mfloat-abi.soft
# And again for mthumb.
MULTILIB_REUSE += mthumb/march.armv8-a/mfloat-abi.soft=marm/march.armv8-a/mfloat-abi.soft
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.vfpv3-d16/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv3-d16/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.vfpv3-d16/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.vfpv4-d16/mfloat-abi.softfp
MULTILIB_REUSE += $(foreach ABI, hard softfp, \
$(foreach ARCH, armv7-a+fp armv7-a+simd armv7ve+simd armv8-a+simd, \
mthumb/march.$(ARCH)/mfloat-abi.$(ABI)=marm/march.$(ARCH)/mfloat-abi.$(ABI)))
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.neon/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.neon/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-vfpv4/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.hard=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7-a/mfpu.neon/mfloat-abi.softfp=mthumb/march.armv7-a/mfpu.neon-fp-armv8/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.vfpv4-d16/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.vfpv4-d16/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv8-a/mfpu.neon-vfpv4/mfloat-abi.softfp
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.hard=mthumb/march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.hard
MULTILIB_REUSE += mthumb/march.armv7ve/mfpu.neon-vfpv4/mfloat-abi.softfp=mthumb/march.armv7ve/mfpu.neon-fp-armv8/mfloat-abi.softfp
# Softfp but no FP, use the soft-float libraries.
MULTILIB_REUSE += $(foreach MODE, arm thumb, \
$(foreach ARCH, armv7-a armv8-a, \
mthumb/march.$(ARCH)/mfloat-abi.soft=m$(MODE)/march.$(ARCH)/mfloat-abi.softfp))

48
gcc/config/arm/t-multilib
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@ -29,6 +29,7 @@ MULTILIB_DIRNAMES =
MULTILIB_EXCEPTIONS =
MULTILIB_MATCHES =
MULTILIB_REUSE =
MULTILIB_REQUIRED =
comma := ,
tm_multilib_list := $(subst $(comma), ,$(TM_MULTILIB_CONFIG))
@ -36,6 +37,26 @@ tm_multilib_list := $(subst $(comma), ,$(TM_MULTILIB_CONFIG))
HAS_APROFILE := $(filter aprofile,$(tm_multilib_list))
HAS_RMPROFILE := $(filter rmprofile,$(tm_multilib_list))
# Produce the combinatorial list of extensions. Where there are
# multiple permutations for a combination, the ordering is the
# selected by the forward ordering of the original list. This matches
# the canonical ordering generated by the canonicalizer in the driver.
#
# For example,
# $(call all_feat_combs, a b)
# will produce
# +a +a+b +b
# but will not include
# +b+a
# The rule is recursive and can be called with any (reasonable) list of
# extensions.
all_feat_combs = +$(firstword $(1)) \
$(if $(wordlist 2, $(words $(1)), $(1)), \
$(foreach OPT, \
$(call all_feat_combs, \
$(wordlist 2, $(words $(1)), $(1))), \
+$(firstword $(1))$(OPT) $(OPT)),)
ifneq (,$(HAS_APROFILE))
include $(srcdir)/config/arm/t-aprofile
endif
@ -45,25 +66,14 @@ endif
SEP := $(and $(HAS_APROFILE),$(HAS_RMPROFILE),/)
# We have the following hierachy:
# ISA: A32 (.) or T16/T32 (thumb)
# Architecture: ARMv6-M (v6-m), ARMv7-M (v7-m), ARMv7E-M (v7e-m),
# ARMv7 (v7-ar), ARMv7-A (v7-a), ARMv7VE (v7ve),
# ARMv8-M Baseline (v8-m.base), ARMv8-M Mainline (v8-m.main)
# or ARMv8-A (v8-a).
# FPU: VFPv3-D16 (fpv3), NEONv1 (simdv1), FPV4-SP-D16 (fpv4-sp),
# VFPv4-D16 (fpv4), NEON-VFPV4 (simdvfpv4), FPV5-SP-D16 (fpv5-sp),
# VFPv5-D16 (fpv5), NEON for ARMv8 (simdv8), or None (.).
# Float-abi: Soft (.), softfp (softfp), or hard (hard).
MULTILIB_OPTIONS += marm/mthumb
MULTILIB_DIRNAMES += arm thumb
MULTILIB_OPTIONS += mthumb
MULTILIB_DIRNAMES += thumb
MULTILIB_OPTIONS += march=armv5te+fp/$(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM)
MULTILIB_DIRNAMES += v5te $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM)
MULTILIB_OPTIONS += $(MULTI_ARCH_OPTS_A)$(SEP)$(MULTI_ARCH_OPTS_RM)
MULTILIB_DIRNAMES += $(MULTI_ARCH_DIRS_A) $(MULTI_ARCH_DIRS_RM)
MULTILIB_OPTIONS += mfloat-abi=soft/mfloat-abi=softfp/mfloat-abi=hard
MULTILIB_DIRNAMES += nofp softfp hard
MULTILIB_OPTIONS += $(MULTI_FPU_OPTS_A)$(SEP)$(MULTI_FPU_OPTS_RM)
MULTILIB_DIRNAMES += $(MULTI_FPU_DIRS_A) $(MULTI_FPU_DIRS_RM)
MULTILIB_OPTIONS += mfloat-abi=softfp/mfloat-abi=hard
MULTILIB_DIRNAMES += softfp hard
MULTILIB_REQUIRED += mthumb/mfloat-abi=soft
MULTILIB_REQUIRED += marm/march=armv5te+fp/mfloat-abi=hard

4
gcc/testsuite/ChangeLog
View File

@ -1,3 +1,7 @@
2017-06-16 Richard Earnshaw <rearnsha@arm.com>
* gcc.target/arm/multilibs.exp: New file.
2017-06-16 Martin Sebor <msebor@redhat.com>
PR tree-optimization/80933

381
gcc/testsuite/gcc.target/arm/multilib.exp Normal file
View File

@ -0,0 +1,381 @@
# Copyright (C) 2017 Free Software Foundation, Inc.
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with GCC; see the file COPYING3. If not see
# <http://www.gnu.org/licenses/>.
load_lib gcc-dg.exp
dg-init
if { [board_info [target_info name] exists multilib_flags]
&& [regexp {(-marm|-mthumb|-march=.*|-mcpu=.*|-mfpu=.*|-mfloat=abi=.*)\y} [board_info [target_info name] multilib_flags]] } {
# Multilib flags override anything we can apply to a test, so
# skip if any of the above options are set there.
verbose "skipping multilib tests due to multilib_flags setting" 1
return
}
# We don't want to run this test multiple times in a parallel make check.
if ![gcc_parallel_test_run_p options] {
return
}
gcc_parallel_test_enable 0
proc multilib_config {profile} {
return [check_configured_with [join [list {with-multilib-list=([^ ]+,)?} $profile {(,[^ ]+)?}] ""]]
}
proc check_multi_dir { gcc_opts multi_dir } {
global tool
set gcc_output [${tool}_target_compile "--print-multi-directory $gcc_opts" "" "none" ""]
if { [string match "$multi_dir\n" $gcc_output] } {
pass "multilibdir $gcc_opts $multi_dir"
} else {
fail "multilibdir $gcc_opts $multi_dir"
}
}
if {[multilib_config "aprofile"] } {
foreach {opts dir} {
{-mcpu=cortex-a8 -mfloat-abi=soft} "thumb/v7-a/nofp"
{-mcpu=cortex-a8 -mfloat-abi=softfp} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a8 -mfloat-abi=hard} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a15} "thumb/v7-a/nofp"
{-mcpu=cortex-a15 -mfloat-abi=hard} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a15 -marm -mfloat-abi=hard} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a15 -mthumb -mfloat-abi=hard} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a7+nosimd -mfloat-abi=hard} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7+nofp -mfloat-abi=softfp} "thumb/v7-a/nofp"
{-mcpu=generic-armv7-a+vfpv4 -mfloat-abi=softfp} "thumb/v7-a+fp/softfp"
{-march=armv7ve+vfpv3 -mfloat-abi=hard} "thumb/v7-a+fp/hard"
{-march=armv7ve -mfloat-abi=softfp -mfpu=neon} "thumb/v7-a+simd/softfp"
{-march=armv7ve -mfloat-abi=softfp -mfpu=neon-vfpv4} "thumb/v7ve+simd/softfp"
{-march=armv7ve -mfloat-abi=softfp -mfpu=vfpv4} "thumb/v7-a+fp/softfp"
{-march=armv8-a+crc+simd -mfloat-abi=soft} "thumb/v8-a/nofp"
{-march=armv8-a+crc+simd -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
{-march=armv8.1-a+crypto -mfloat-abi=soft} "thumb/v8-a/nofp"
{-march=armv8.1-a+crypto -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
{-march=armv8.2-a+crypto -mfloat-abi=soft} "thumb/v8-a/nofp"
{-march=armv8.2-a+simd+crypto -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
{-march=armv8.2-a+simd+crypto+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
{-march=armv8.2-a+simd+nofp+crypto -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a53+crypto -mfloat-abi=hard} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a53+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
{-march=armv8-a+crc -mfloat-abi=hard -mfpu=vfp} "thumb/v8-a+simd/hard"
{-march=armv8-a+crc+simd -mfloat-abi=soft -mfpu=neon} "thumb/v8-a/nofp"
{-mcpu=cortex-a8 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a5 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a7 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a53 -mfpu=neon -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a5 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a9 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a53 -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a5 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a9 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a7 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a15 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a53 -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a5 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a7 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a53 -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a5 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a9 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7ve+simd/softfp"
{-mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7ve+simd/softfp"
{-mcpu=cortex-a53 -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a5 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a9 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a7 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7ve+simd/softfp"
{-mcpu=cortex-a15 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7ve+simd/softfp"
{-mcpu=cortex-a53 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv3-d16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv3-d16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv3 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv3 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv4-d16 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv4-d16 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv4 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv4 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=neon -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-march=armv8-a -mfpu=neon -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=neon -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-march=armv8-a -mfpu=neon-vfpv4 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v7-a+simd/hard"
{-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -marm} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -marm} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a5 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a7 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a53 -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a5 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a9 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a53 -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a5 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a9 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a7 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a15 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-mcpu=cortex-a53 -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a5 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a9 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-mcpu=cortex-a7 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a15 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7ve+simd/hard"
{-mcpu=cortex-a53 -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-mcpu=cortex-a8 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a5 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a9 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a7 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a15 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a53 -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a5 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a9 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a7 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7ve+simd/softfp"
{-mcpu=cortex-a15 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7ve+simd/softfp"
{-mcpu=cortex-a53 -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a5 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a9 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a7 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a15 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-mcpu=cortex-a53 -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-mcpu=cortex-a8 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a5 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a9 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-mcpu=cortex-a7 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7ve+simd/softfp"
{-mcpu=cortex-a15 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7ve+simd/softfp"
{-mcpu=cortex-a53 -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv3-d16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv3-d16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv3-d16-fp16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv3 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv3 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv4-d16 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv4-d16 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=vfpv4 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-march=armv8-a -mfpu=neon -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=neon -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-march=armv8-a -mfpu=neon-vfpv4 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=neon-vfpv4 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+fp/hard"
{-march=armv8-a -mfpu=fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+fp/softfp"
{-march=armv8-a -mfpu=fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
{-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v7-a+simd/hard"
{-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=hard -mthumb} "thumb/v8-a+simd/hard"
{-march=armv7-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v7-a+simd/softfp"
{-march=armv8-a -mfpu=crypto-neon-fp-armv8 -mfloat-abi=softfp -mthumb} "thumb/v8-a+simd/softfp"
} {
check_multi_dir $opts $dir
}
}
gcc_parallel_test_enable 1