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[AArch64] Fix predicate and constraint mismatch in logical atomic operations 

2014-11-04  Michael Collison <michael.collison@linaro.org>

	* config/aarch64/iterators.md (lconst_atomic): New mode attribute
	to support constraints for CONST_INT in atomic operations.
	* config/aarch64/atomics.md
	(atomic_<atomic_optab><mode>): Use lconst_atomic constraint.
	(atomic_nand<mode>): Likewise.
	(atomic_fetch_<atomic_optab><mode>): Likewise.
	(atomic_fetch_nand<mode>): Likewise.
	(atomic_<atomic_optab>_fetch<mode>): Likewise.
	(atomic_nand_fetch<mode>): Likewise.

From-SVN: r217076
This commit is contained in:
Michael Collison 2014-11-04 11:23:10 +00:00 committed by Christophe Lyon
parent 5d1f63255b
commit 95d47b10be
3 changed files with 21 additions and 6 deletions
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12
gcc/ChangeLog
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@ -1,3 +1,15 @@
2014-11-04 Michael Collison <michael.collison@linaro.org>
* config/aarch64/iterators.md (lconst_atomic): New mode attribute
to support constraints for CONST_INT in atomic operations.
* config/aarch64/atomics.md
(atomic_<atomic_optab><mode>): Use lconst_atomic constraint.
(atomic_nand<mode>): Likewise.
(atomic_fetch_<atomic_optab><mode>): Likewise.
(atomic_fetch_nand<mode>): Likewise.
(atomic_<atomic_optab>_fetch<mode>): Likewise.
(atomic_nand_fetch<mode>): Likewise.
2014-11-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com> 2014-11-04 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
* config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Fix typo in definition * config/arm/arm.h (TARGET_CPU_CPP_BUILTINS): Fix typo in definition

12
gcc/config/aarch64/atomics.md
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@ -119,7 +119,7 @@
[(set (match_operand:ALLI 0 "aarch64_sync_memory_operand" "+Q") [(set (match_operand:ALLI 0 "aarch64_sync_memory_operand" "+Q")
(unspec_volatile:ALLI (unspec_volatile:ALLI
[(atomic_op:ALLI (match_dup 0) [(atomic_op:ALLI (match_dup 0)
(match_operand:ALLI 1 "<atomic_op_operand>" "rn")) (match_operand:ALLI 1 "<atomic_op_operand>" "r<lconst_atomic>"))
(match_operand:SI 2 "const_int_operand")] ;; model (match_operand:SI 2 "const_int_operand")] ;; model
UNSPECV_ATOMIC_OP)) UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM)) (clobber (reg:CC CC_REGNUM))
@ -141,7 +141,7 @@
(unspec_volatile:ALLI (unspec_volatile:ALLI
[(not:ALLI [(not:ALLI
(and:ALLI (match_dup 0) (and:ALLI (match_dup 0)
(match_operand:ALLI 1 "aarch64_logical_operand" "rn"))) (match_operand:ALLI 1 "aarch64_logical_operand" "r<lconst_atomic>")))
(match_operand:SI 2 "const_int_operand")] ;; model (match_operand:SI 2 "const_int_operand")] ;; model
UNSPECV_ATOMIC_OP)) UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM)) (clobber (reg:CC CC_REGNUM))
@ -164,7 +164,7 @@
(set (match_dup 1) (set (match_dup 1)
(unspec_volatile:ALLI (unspec_volatile:ALLI
[(atomic_op:ALLI (match_dup 1) [(atomic_op:ALLI (match_dup 1)
(match_operand:ALLI 2 "<atomic_op_operand>" "rn")) (match_operand:ALLI 2 "<atomic_op_operand>" "r<lconst_atomic>"))
(match_operand:SI 3 "const_int_operand")] ;; model (match_operand:SI 3 "const_int_operand")] ;; model
UNSPECV_ATOMIC_OP)) UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM)) (clobber (reg:CC CC_REGNUM))
@ -188,7 +188,7 @@
(unspec_volatile:ALLI (unspec_volatile:ALLI
[(not:ALLI [(not:ALLI
(and:ALLI (match_dup 1) (and:ALLI (match_dup 1)
(match_operand:ALLI 2 "aarch64_logical_operand" "rn"))) (match_operand:ALLI 2 "aarch64_logical_operand" "r<lconst_atomic>")))
(match_operand:SI 3 "const_int_operand")] ;; model (match_operand:SI 3 "const_int_operand")] ;; model
UNSPECV_ATOMIC_OP)) UNSPECV_ATOMIC_OP))
(clobber (reg:CC CC_REGNUM)) (clobber (reg:CC CC_REGNUM))
@ -209,7 +209,7 @@
[(set (match_operand:ALLI 0 "register_operand" "=&r") [(set (match_operand:ALLI 0 "register_operand" "=&r")
(atomic_op:ALLI (atomic_op:ALLI
(match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q") (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")
(match_operand:ALLI 2 "<atomic_op_operand>" "rn"))) (match_operand:ALLI 2 "<atomic_op_operand>" "r<lconst_atomic>")))
(set (match_dup 1) (set (match_dup 1)
(unspec_volatile:ALLI (unspec_volatile:ALLI
[(match_dup 1) (match_dup 2) [(match_dup 1) (match_dup 2)
@ -233,7 +233,7 @@
(not:ALLI (not:ALLI
(and:ALLI (and:ALLI
(match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q") (match_operand:ALLI 1 "aarch64_sync_memory_operand" "+Q")
(match_operand:ALLI 2 "aarch64_logical_operand" "rn")))) (match_operand:ALLI 2 "aarch64_logical_operand" "r<lconst_atomic>"))))
(set (match_dup 1) (set (match_dup 1)
(unspec_volatile:ALLI (unspec_volatile:ALLI
[(match_dup 1) (match_dup 2) [(match_dup 1) (match_dup 2)

3
gcc/config/aarch64/iterators.md
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@ -361,6 +361,9 @@
;; Attribute to describe constants acceptable in logical operations ;; Attribute to describe constants acceptable in logical operations
(define_mode_attr lconst [(SI "K") (DI "L")]) (define_mode_attr lconst [(SI "K") (DI "L")])
;; Attribute to describe constants acceptable in atomic logical operations
(define_mode_attr lconst_atomic [(QI "K") (HI "K") (SI "K") (DI "L")])
;; Map a mode to a specific constraint character. ;; Map a mode to a specific constraint character.
(define_mode_attr cmode [(QI "q") (HI "h") (SI "s") (DI "d")]) (define_mode_attr cmode [(QI "q") (HI "h") (SI "s") (DI "d")])