MIPS: Add support for -mcrc and -mginv options.

gcc/ChangeLog:

2018-06-15  Matthew Fortune  <matthew.fortune@mips.com>

	* config/mips/mips.h (ASM_SPEC): Pass through -mcrc, -mno-crc,
	-mginv and -mno-ginv to the assembler.
	* config/mips/mips.opt (-mcrc): New option.
	(-mginv): Likewise.
	* doc/invoke.text (-mcrc): Document.
	(-mginv): Likewise.

From-SVN: r261635

gcc/ChangeLog

@@ -1,3 +1,12 @@
+2018-06-15  Matthew Fortune  <matthew.fortune@mips.com>
+
+	* config/mips/mips.h (ASM_SPEC): Pass through -mcrc, -mno-crc,
+	-mginv and -mno-ginv to the assembler.
+	* config/mips/mips.opt (-mcrc): New option.
+	(-mginv): Likewise.
+	* doc/invoke.text (-mcrc): Document.
+	(-mginv): Likewise.
+
 2018-06-15  Nick Clifton  <nickc@redhat.com>
 
 	PR 84195

gcc/config/mips/mips.h

@@ -1355,6 +1355,8 @@ struct mips_cpu_info {
 %{meva} %{mno-eva} \
 %{mvirt} %{mno-virt} \
 %{mxpa} %{mno-xpa} \
+%{mcrc} %{mno-crc} \
+%{mginv} %{mno-ginv} \
 %{mmsa} %{mno-msa} \
 %{msmartmips} %{mno-smartmips} \
 %{mmt} %{mno-mt} \

gcc/config/mips/mips.opt

@@ -412,6 +412,14 @@ mxpa
 Target Report Var(TARGET_XPA)
 Use eXtended Physical Address (XPA) instructions.
 
+mcrc
+Target Report Var(TARGET_CRC)
+Use Cyclic Redundancy Check (CRC) instructions.
+
+mginv
+Target Report Var(TARGET_GINV)
+Use Global INValidate (GINV) instructions.
+
 mvr4130-align
 Target Report Mask(VR4130_ALIGN)
 Perform VR4130-specific alignment optimizations.

gcc/doc/invoke.texi

@@ -878,6 +878,8 @@ Objective-C and Objective-C++ Dialects}.
 -meva  -mno-eva @gol
 -mvirt  -mno-virt @gol
 -mxpa  -mno-xpa @gol
+-mcrc -mno-crc @gol
+-mginv -mno-ginv @gol
 -mmicromips  -mno-micromips @gol
 -mmsa  -mno-msa @gol
 -mfpu=@var{fpu-type} @gol
@@ -20590,6 +20592,18 @@ Use (do not use) the MIPS Virtualization (VZ) instructions.
 @opindex mno-xpa
 Use (do not use) the MIPS eXtended Physical Address (XPA) instructions.
 
+@item -mcrc
+@itemx -mno-crc
+@opindex mcrc
+@opindex mno-crc
+Use (do not use) the MIPS Cyclic Redundancy Check (CRC) instructions.
+
+@item -mginv
+@itemx -mno-ginv
+@opindex mginv
+@opindex mno-ginv
+Use (do not use) the MIPS Global INValidate (GINV) instructions.
+
 @item -mlong64
 @opindex mlong64
 Force @code{long} types to be 64 bits wide.  See @option{-mlong32} for