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neon.ml (ops): Fixup expected instructions for unsigned vector compares. 

* gcc/config/arm/neon.ml (ops): Fixup expected instructions for
	unsigned vector compares.

From-SVN: r185328
This commit is contained in:
Matthew Gretton-Dann 2012-03-13 10:53:57 +00:00 committed by Matthew Gretton-Dann
parent 9ec9602396
commit a0a6e3f70a
2 changed files with 21 additions and 6 deletions
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5
gcc/ChangeLog
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@ -1,3 +1,8 @@
2012-03-13 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* config/arm/neon.ml (ops): Fixup expected instructions for
unsigned vector compares.
2012-03-13 Uros Bizjak <ubizjak@gmail.com> 2012-03-13 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_decompose_address): Prevent %fs:(%reg) * config/i386/i386.c (ix86_decompose_address): Prevent %fs:(%reg)

22
gcc/config/arm/neon.ml
View File

@ -780,14 +780,19 @@ let ops =
(* Comparison, greater-than or equal. *) (* Comparison, greater-than or equal. *)
Vcge, [], All (3, Dreg), "vcge", cmp_sign_matters, F32 :: s_8_32; Vcge, [], All (3, Dreg), "vcge", cmp_sign_matters, F32 :: s_8_32;
Vcge, [Builtin_name "vcgeu"], All (3, Dreg), "vcge", cmp_sign_matters, u_8_32; Vcge, [Instruction_name ["vcge"]; Builtin_name "vcgeu"],
All (3, Dreg), "vcge", cmp_sign_matters,
u_8_32;
Vcge, [], All (3, Qreg), "vcgeQ", cmp_sign_matters, F32 :: s_8_32; Vcge, [], All (3, Qreg), "vcgeQ", cmp_sign_matters, F32 :: s_8_32;
Vcge, [Builtin_name "vcgeu"], All (3, Qreg), "vcgeQ", cmp_sign_matters, u_8_32; Vcge, [Instruction_name ["vcge"]; Builtin_name "vcgeu"],
All (3, Qreg), "vcgeQ", cmp_sign_matters,
u_8_32;
(* Comparison, less-than or equal. *) (* Comparison, less-than or equal. *)
Vcle, [Flipped "vcge"], All (3, Dreg), "vcle", cmp_sign_matters, Vcle, [Flipped "vcge"], All (3, Dreg), "vcle", cmp_sign_matters,
F32 :: s_8_32; F32 :: s_8_32;
Vcle, [Flipped "vcgeu"], All (3, Dreg), "vcle", cmp_sign_matters, Vcle, [Instruction_name ["vcge"]; Flipped "vcgeu"],
All (3, Dreg), "vcle", cmp_sign_matters,
u_8_32; u_8_32;
Vcle, [Instruction_name ["vcge"]; Flipped "vcgeQ"], Vcle, [Instruction_name ["vcge"]; Flipped "vcgeQ"],
All (3, Qreg), "vcleQ", cmp_sign_matters, All (3, Qreg), "vcleQ", cmp_sign_matters,
@ -798,14 +803,19 @@ let ops =
(* Comparison, greater-than. *) (* Comparison, greater-than. *)
Vcgt, [], All (3, Dreg), "vcgt", cmp_sign_matters, F32 :: s_8_32; Vcgt, [], All (3, Dreg), "vcgt", cmp_sign_matters, F32 :: s_8_32;
Vcgt, [Builtin_name "vcgtu"], All (3, Dreg), "vcgt", cmp_sign_matters, u_8_32; Vcgt, [Instruction_name ["vcgt"]; Builtin_name "vcgtu"],
All (3, Dreg), "vcgt", cmp_sign_matters,
u_8_32;
Vcgt, [], All (3, Qreg), "vcgtQ", cmp_sign_matters, F32 :: s_8_32; Vcgt, [], All (3, Qreg), "vcgtQ", cmp_sign_matters, F32 :: s_8_32;
Vcgt, [Builtin_name "vcgtu"], All (3, Qreg), "vcgtQ", cmp_sign_matters, u_8_32; Vcgt, [Instruction_name ["vcgt"]; Builtin_name "vcgtu"],
All (3, Qreg), "vcgtQ", cmp_sign_matters,
u_8_32;
(* Comparison, less-than. *) (* Comparison, less-than. *)
Vclt, [Flipped "vcgt"], All (3, Dreg), "vclt", cmp_sign_matters, Vclt, [Flipped "vcgt"], All (3, Dreg), "vclt", cmp_sign_matters,
F32 :: s_8_32; F32 :: s_8_32;
Vclt, [Flipped "vcgtu"], All (3, Dreg), "vclt", cmp_sign_matters, Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtu"],
All (3, Dreg), "vclt", cmp_sign_matters,
u_8_32; u_8_32;
Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtQ"], Vclt, [Instruction_name ["vcgt"]; Flipped "vcgtQ"],
All (3, Qreg), "vcltQ", cmp_sign_matters, All (3, Qreg), "vcltQ", cmp_sign_matters,