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doc: update x86 -mcx16 option description 

* doc/invoke.texi (mcx16): Rewrite.

From-SVN: r248995
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Alexander Monakov 2017-06-08 00:51:51 +03:00 committed by Alexander Monakov
parent aa5493116b
commit a4fe64ee20
2 changed files with 10 additions and 7 deletions
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gcc/ChangeLog
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@ -1,3 +1,7 @@
2017-06-07 Alexander Monakov <amonakov@ispras.ru>
* doc/invoke.texi (mcx16): Rewrite.
2017-06-07 Segher Boessenkool <segher@kernel.crashing.org> 2017-06-07 Segher Boessenkool <segher@kernel.crashing.org>
* config/rs6000/predicates.md (rs6000_nonimmediate_operand): Delete. * config/rs6000/predicates.md (rs6000_nonimmediate_operand): Delete.

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gcc/doc/invoke.texi
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@ -25262,13 +25262,12 @@ This option instructs GCC to use 128-bit AVX instructions instead of
@item -mcx16 @item -mcx16
@opindex mcx16 @opindex mcx16
This option enables GCC to generate @code{CMPXCHG16B} instructions. This option enables GCC to generate @code{CMPXCHG16B} instructions in 64-bit
@code{CMPXCHG16B} allows for atomic operations on 128-bit double quadword code to implement compare-and-exchange operations on 16-byte aligned 128-bit
(or oword) data types. objects. This is useful for atomic updates of data structures exceeding one
This is useful for high-resolution counters that can be updated machine word in size. The compiler uses this instruction to implement
by multiple processors (or cores). This instruction is generated as part of @ref{__sync Builtins}. However, for @ref{__atomic Builtins} operating on
atomic built-in functions: see @ref{__sync Builtins} or 128-bit integers, a library call is always used.
@ref{__atomic Builtins} for details.
@item -msahf @item -msahf
@opindex msahf @opindex msahf