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i386.md (paritydi2): Use ix86_expand_setcc. 

* config/i386/i386.md (paritydi2): Use ix86_expand_setcc.
	(paritysi2): Ditto.
	(isinfxf2): Ditto.
	(isinf<mode>2): Ditto.

From-SVN: r237382
This commit is contained in:
Uros Bizjak 2016-06-13 16:38:51 +02:00 committed by Uros Bizjak
parent 30717592e2
commit ac43f1a8c4
2 changed files with 15 additions and 22 deletions
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7
gcc/ChangeLog
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@ -1,3 +1,10 @@
2016-06-13 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.md (paritydi2): Use ix86_expand_setcc.
(paritysi2): Ditto.
(isinfxf2): Ditto.
(isinf<mode>2): Ditto.
2016-06-13 Uros Bizjak <ubizjak@gmail.com> 2016-06-13 Uros Bizjak <ubizjak@gmail.com>
* ggc-tests.c (test_finalization): Only test need_finalization_p * ggc-tests.c (test_finalization): Only test need_finalization_p

30
gcc/config/i386/i386.md
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@ -13458,15 +13458,12 @@
"! TARGET_POPCNT" "! TARGET_POPCNT"
{ {
rtx scratch = gen_reg_rtx (QImode); rtx scratch = gen_reg_rtx (QImode);
rtx cond;
emit_insn (gen_paritydi2_cmp (NULL_RTX, NULL_RTX, emit_insn (gen_paritydi2_cmp (NULL_RTX, NULL_RTX,
NULL_RTX, operands[1])); NULL_RTX, operands[1]));
cond = gen_rtx_fmt_ee (ORDERED, QImode, ix86_expand_setcc (scratch, ORDERED,
gen_rtx_REG (CCmode, FLAGS_REG), gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
const0_rtx);
emit_insn (gen_rtx_SET (scratch, cond));
if (TARGET_64BIT) if (TARGET_64BIT)
emit_insn (gen_zero_extendqidi2 (operands[0], scratch)); emit_insn (gen_zero_extendqidi2 (operands[0], scratch));
@ -13486,14 +13483,11 @@
"! TARGET_POPCNT" "! TARGET_POPCNT"
{ {
rtx scratch = gen_reg_rtx (QImode); rtx scratch = gen_reg_rtx (QImode);
rtx cond;
emit_insn (gen_paritysi2_cmp (NULL_RTX, NULL_RTX, operands[1])); emit_insn (gen_paritysi2_cmp (NULL_RTX, NULL_RTX, operands[1]));
cond = gen_rtx_fmt_ee (ORDERED, QImode, ix86_expand_setcc (scratch, ORDERED,
gen_rtx_REG (CCmode, FLAGS_REG), gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
const0_rtx);
emit_insn (gen_rtx_SET (scratch, cond));
emit_insn (gen_zero_extendqisi2 (operands[0], scratch)); emit_insn (gen_zero_extendqisi2 (operands[0], scratch));
DONE; DONE;
@ -16159,8 +16153,6 @@
rtx mask = GEN_INT (0x45); rtx mask = GEN_INT (0x45);
rtx val = GEN_INT (0x05); rtx val = GEN_INT (0x05);
rtx cond;
rtx scratch = gen_reg_rtx (HImode); rtx scratch = gen_reg_rtx (HImode);
rtx res = gen_reg_rtx (QImode); rtx res = gen_reg_rtx (QImode);
@ -16168,10 +16160,8 @@
emit_insn (gen_andqi_ext_0 (scratch, scratch, mask)); emit_insn (gen_andqi_ext_0 (scratch, scratch, mask));
emit_insn (gen_cmpqi_ext_3 (scratch, val)); emit_insn (gen_cmpqi_ext_3 (scratch, val));
cond = gen_rtx_fmt_ee (EQ, QImode, ix86_expand_setcc (res, EQ,
gen_rtx_REG (CCmode, FLAGS_REG), gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
const0_rtx);
emit_insn (gen_rtx_SET (res, cond));
emit_insn (gen_zero_extendqisi2 (operands[0], res)); emit_insn (gen_zero_extendqisi2 (operands[0], res));
DONE; DONE;
}) })
@ -16186,8 +16176,6 @@
rtx mask = GEN_INT (0x45); rtx mask = GEN_INT (0x45);
rtx val = GEN_INT (0x05); rtx val = GEN_INT (0x05);
rtx cond;
rtx scratch = gen_reg_rtx (HImode); rtx scratch = gen_reg_rtx (HImode);
rtx res = gen_reg_rtx (QImode); rtx res = gen_reg_rtx (QImode);
@ -16204,10 +16192,8 @@
emit_insn (gen_andqi_ext_0 (scratch, scratch, mask)); emit_insn (gen_andqi_ext_0 (scratch, scratch, mask));
emit_insn (gen_cmpqi_ext_3 (scratch, val)); emit_insn (gen_cmpqi_ext_3 (scratch, val));
cond = gen_rtx_fmt_ee (EQ, QImode, ix86_expand_setcc (res, EQ,
gen_rtx_REG (CCmode, FLAGS_REG), gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx);
const0_rtx);
emit_insn (gen_rtx_SET (res, cond));
emit_insn (gen_zero_extendqisi2 (operands[0], res)); emit_insn (gen_zero_extendqisi2 (operands[0], res));
DONE; DONE;
}) })