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re PR target/65979 ([SH] Wrong code is generated with stage1 compiler)
PR target/65979 * config/sh/sh.md (tstsi_t peephole2): Use gen_rtx_SET and take into account the case that operands[1] and operands[2] are the same register. From-SVN: r223721
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@ -1,3 +1,10 @@
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2015-05-26 Oleg Endo <olegendo@gcc.gnu.org>
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PR target/65979
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* config/sh/sh.md (tstsi_t peephole2): Use gen_rtx_SET and
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take into account the case that operands[1] and operands[2]
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are the same register.
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2015-05-26 Michael Matz <matz@suse.de>
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2015-05-26 Michael Matz <matz@suse.de>
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PR middle-end/66251
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PR middle-end/66251
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@ -14722,7 +14722,11 @@ label:
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|| REGNO (operands[2]) == REGNO (operands[5]))"
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|| REGNO (operands[2]) == REGNO (operands[5]))"
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[(const_int 0)]
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[(const_int 0)]
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{
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{
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sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[3]));
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if (REGNO (operands[1]) == REGNO (operands[2]))
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operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]));
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sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2],
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operands[3])));
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emit_insn (gen_tstsi_t (operands[2],
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emit_insn (gen_tstsi_t (operands[2],
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gen_rtx_REG (SImode, (REGNO (operands[1])))));
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gen_rtx_REG (SImode, (REGNO (operands[1])))));
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})
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})
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@ -14749,7 +14753,8 @@ label:
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|| REGNO (operands[2]) == REGNO (operands[5]))"
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|| REGNO (operands[2]) == REGNO (operands[5]))"
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[(const_int 0)]
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[(const_int 0)]
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{
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{
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sh_check_add_incdec_notes (emit_move_insn (operands[2], operands[3]));
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sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2],
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operands[3])));
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emit_insn (gen_tstsi_t (operands[2],
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emit_insn (gen_tstsi_t (operands[2],
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gen_rtx_REG (SImode, (REGNO (operands[1])))));
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gen_rtx_REG (SImode, (REGNO (operands[1])))));
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})
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})
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