mirror of git://gcc.gnu.org/git/gcc.git
sse.md (unspec): Add UNSPEC_RCP14...
* config/i386/sse.md (unspec): Add UNSPEC_RCP14, UNSPEC_RSQRT14, UNSPEC_FIXUPIMM, UNSPEC_SCALEF, UNSPEC_GETEXP, UNSPEC_GETMANT, UNSPEC_EXP2, UNSPEC_RCP28, UNSPEC_RSQRT28. (rcp14<mode>): New. (srcp14<mode>): Ditto. (rsqrt14<mode>): Ditto. (rsqrt14<mode>): Ditto. (avx512f_vmscalef<mode>): Ditto. (avx512f_scalef<mode>): Ditto. (avx512f_getexp<mode>): Ditto. (avx512f_sgetexp<mode>): Ditto. (avx512f_fixupimm<mode>): Ditto. (avx512f_sfixupimm<mode>): Ditto. (avx512f_rndscale<mode>): Ditto. (*avx512er_exp2<mode>): Ditto. (*avx512er_rcp28<mode>): Ditto. (avx512er_rsqrt28<mode>): Ditto. (avx512f_getmant<mode>): Ditto. (avx512f_getmant<mode>): Ditto. (avx512f_rndscale<mode>): Fix formatting. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> Co-Authored-By: Sergey Lega <sergey.s.lega@intel.com> From-SVN: r203609
This commit is contained in:
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4cb1359729
commit
afb4ac68f0
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@ -1,3 +1,35 @@
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2013-10-15 Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Anna Tikhonova <anna.tikhonova@intel.com>
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Ilya Tocar <ilya.tocar@intel.com>
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Andrey Turetskiy <andrey.turetskiy@intel.com>
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Ilya Verbin <ilya.verbin@intel.com>
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Kirill Yukhin <kirill.yukhin@intel.com>
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Michael Zolotukhin <michael.v.zolotukhin@intel.com>
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* config/i386/sse.md (unspec): Add UNSPEC_RCP14, UNSPEC_RSQRT14,
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UNSPEC_FIXUPIMM, UNSPEC_SCALEF, UNSPEC_GETEXP, UNSPEC_GETMANT,
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UNSPEC_EXP2, UNSPEC_RCP28, UNSPEC_RSQRT28.
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(rcp14<mode>): New.
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(srcp14<mode>): Ditto.
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(rsqrt14<mode>): Ditto.
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(rsqrt14<mode>): Ditto.
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(avx512f_vmscalef<mode>): Ditto.
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(avx512f_scalef<mode>): Ditto.
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(avx512f_getexp<mode>): Ditto.
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(avx512f_sgetexp<mode>): Ditto.
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(avx512f_fixupimm<mode>): Ditto.
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(avx512f_sfixupimm<mode>): Ditto.
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(avx512f_rndscale<mode>): Ditto.
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(*avx512er_exp2<mode>): Ditto.
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(*avx512er_rcp28<mode>): Ditto.
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(avx512er_rsqrt28<mode>): Ditto.
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(avx512f_getmant<mode>): Ditto.
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(avx512f_getmant<mode>): Ditto.
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(avx512f_rndscale<mode>): Fix formatting.
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2013-10-15 Alexander Ivchenko <alexander.ivchenko@intel.com>
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2013-10-15 Alexander Ivchenko <alexander.ivchenko@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Maxim Kuznetsov <maxim.kuznetsov@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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Sergey Lega <sergey.s.lega@intel.com>
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@ -91,7 +91,13 @@
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UNSPEC_TESTM
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UNSPEC_TESTM
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UNSPEC_TESTNM
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UNSPEC_TESTNM
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UNSPEC_SCATTER
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UNSPEC_SCATTER
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UNSPEC_RCP14
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UNSPEC_RSQRT14
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UNSPEC_FIXUPIMM
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UNSPEC_SCALEF
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UNSPEC_VTERNLOG
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UNSPEC_VTERNLOG
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UNSPEC_GETEXP
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UNSPEC_GETMANT
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UNSPEC_ALIGN
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UNSPEC_ALIGN
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UNSPEC_CONFLICT
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UNSPEC_CONFLICT
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UNSPEC_MASKED_EQ
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UNSPEC_MASKED_EQ
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@ -100,6 +106,11 @@
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;; For AVX512PF support
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;; For AVX512PF support
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UNSPEC_GATHER_PREFETCH
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UNSPEC_GATHER_PREFETCH
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UNSPEC_SCATTER_PREFETCH
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UNSPEC_SCATTER_PREFETCH
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;; For AVX512ER support
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UNSPEC_EXP2
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UNSPEC_RCP28
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UNSPEC_RSQRT28
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])
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])
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(define_c_enum "unspecv" [
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(define_c_enum "unspecv" [
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@ -1254,6 +1265,32 @@
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(set_attr "prefix" "orig,vex")
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(set_attr "prefix" "orig,vex")
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(set_attr "mode" "SF")])
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(set_attr "mode" "SF")])
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(define_insn "rcp14<mode>"
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[(set (match_operand:VF_512 0 "register_operand" "=v")
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(unspec:VF_512
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[(match_operand:VF_512 1 "nonimmediate_operand" "vm")]
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UNSPEC_RCP14))]
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"TARGET_AVX512F"
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"vrcp14<ssemodesuffix>\t{%1, %0|%0, %1}"
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[(set_attr "type" "sse")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(define_insn "srcp14<mode>"
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[(set (match_operand:VF_128 0 "register_operand" "=v")
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(vec_merge:VF_128
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(unspec:VF_128
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[(match_operand:VF_128 1 "register_operand" "v")
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(match_operand:VF_128 2 "nonimmediate_operand" "vm")]
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UNSPEC_RCP14)
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(match_dup 1)
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(const_int 1)))]
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"TARGET_AVX512F"
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"vrcp14<ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "type" "sse")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(define_expand "sqrt<mode>2"
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(define_expand "sqrt<mode>2"
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[(set (match_operand:VF2 0 "register_operand")
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[(set (match_operand:VF2 0 "register_operand")
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(sqrt:VF2 (match_operand:VF2 1 "nonimmediate_operand")))]
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(sqrt:VF2 (match_operand:VF2 1 "nonimmediate_operand")))]
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@ -1324,6 +1361,32 @@
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(set_attr "prefix" "maybe_vex")
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(set_attr "prefix" "maybe_vex")
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(set_attr "mode" "<MODE>")])
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(set_attr "mode" "<MODE>")])
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(define_insn "rsqrt14<mode>"
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[(set (match_operand:VF_512 0 "register_operand" "=v")
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(unspec:VF_512
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[(match_operand:VF_512 1 "nonimmediate_operand" "vm")]
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UNSPEC_RSQRT14))]
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"TARGET_AVX512F"
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"vrsqrt14<ssemodesuffix>\t{%1, %0|%0, %1}"
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[(set_attr "type" "sse")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(define_insn "rsqrt14<mode>"
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[(set (match_operand:VF_128 0 "register_operand" "=v")
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(vec_merge:VF_128
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(unspec:VF_128
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[(match_operand:VF_128 1 "register_operand" "v")
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(match_operand:VF_128 2 "nonimmediate_operand" "vm")]
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UNSPEC_RSQRT14)
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(match_dup 1)
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(const_int 1)))]
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"TARGET_AVX512F"
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"vrsqrt14<ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "type" "sse")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(define_insn "sse_vmrsqrtv4sf2"
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(define_insn "sse_vmrsqrtv4sf2"
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[(set (match_operand:V4SF 0 "register_operand" "=x,x")
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[(set (match_operand:V4SF 0 "register_operand" "=x,x")
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(vec_merge:V4SF
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(vec_merge:V4SF
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@ -5305,6 +5368,29 @@
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operands[1] = adjust_address (operands[1], DFmode, INTVAL (operands[2]) * 8);
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operands[1] = adjust_address (operands[1], DFmode, INTVAL (operands[2]) * 8);
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})
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})
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(define_insn "avx512f_vmscalef<mode>"
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[(set (match_operand:VF_128 0 "register_operand" "=v")
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(vec_merge:VF_128
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(unspec:VF_128 [(match_operand:VF_128 1 "register_operand" "v")
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(match_operand:VF_128 2 "nonimmediate_operand" "vm")]
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UNSPEC_SCALEF)
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(match_dup 1)
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(const_int 1)))]
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"TARGET_AVX512F"
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"%vscalef<ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "prefix" "evex")
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(set_attr "mode" "<ssescalarmode>")])
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(define_insn "avx512f_scalef<mode>"
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[(set (match_operand:VF_512 0 "register_operand" "=v")
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(unspec:VF_512 [(match_operand:VF_512 1 "register_operand" "v")
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(match_operand:VF_512 2 "nonimmediate_operand" "vm")]
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UNSPEC_SCALEF))]
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"TARGET_AVX512F"
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"%vscalef<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(define_insn "avx512f_vternlog<mode>"
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(define_insn "avx512f_vternlog<mode>"
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[(set (match_operand:VI48_512 0 "register_operand" "=v")
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[(set (match_operand:VI48_512 0 "register_operand" "=v")
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(unspec:VI48_512
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(unspec:VI48_512
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@ -5319,6 +5405,28 @@
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(set_attr "prefix" "evex")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "avx512f_getexp<mode>"
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[(set (match_operand:VF_512 0 "register_operand" "=v")
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(unspec:VF_512 [(match_operand:VF_512 1 "nonimmediate_operand" "vm")]
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UNSPEC_GETEXP))]
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"TARGET_AVX512F"
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"vgetexp<ssemodesuffix>\t{%1, %0|%0, %1}";
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[(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(define_insn "avx512f_sgetexp<mode>"
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[(set (match_operand:VF_128 0 "register_operand" "=v")
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(vec_merge:VF_128
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(unspec:VF_128 [(match_operand:VF_128 1 "register_operand" "v")
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(match_operand:VF_128 2 "nonimmediate_operand" "vm")]
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UNSPEC_GETEXP)
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(match_dup 1)
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(const_int 1)))]
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"TARGET_AVX512F"
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"vgetexp<ssescalarmodesuffix>\t{%2, %1, %0|%0, %1, %2}";
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[(set_attr "prefix" "evex")
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(set_attr "mode" "<ssescalarmode>")])
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(define_insn "avx512f_align<mode>"
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(define_insn "avx512f_align<mode>"
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[(set (match_operand:VI48_512 0 "register_operand" "=v")
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[(set (match_operand:VI48_512 0 "register_operand" "=v")
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(unspec:VI48_512 [(match_operand:VI48_512 1 "register_operand" "v")
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(unspec:VI48_512 [(match_operand:VI48_512 1 "register_operand" "v")
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@ -5330,18 +5438,63 @@
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[(set_attr "prefix" "evex")
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[(set_attr "prefix" "evex")
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(set_attr "mode" "<sseinsnmode>")])
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(set_attr "mode" "<sseinsnmode>")])
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(define_insn "avx512f_fixupimm<mode>"
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[(set (match_operand:VF_512 0 "register_operand" "=v")
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(unspec:VF_512
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[(match_operand:VF_512 1 "register_operand" "0")
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(match_operand:VF_512 2 "register_operand" "v")
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(match_operand:<sseintvecmode> 3 "nonimmediate_operand" "vm")
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(match_operand:SI 4 "const_0_to_255_operand")]
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UNSPEC_FIXUPIMM))]
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"TARGET_AVX512F"
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"vfixupimm<ssemodesuffix>\t{%4, %3, %2, %0|%0, %2, %3, %4}";
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[(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(define_insn "avx512f_sfixupimm<mode>"
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[(set (match_operand:VF_128 0 "register_operand" "=v")
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(vec_merge:VF_128
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(unspec:VF_128
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[(match_operand:VF_128 1 "register_operand" "0")
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(match_operand:VF_128 2 "register_operand" "v")
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(match_operand:<sseintvecmode> 3 "nonimmediate_operand" "vm")
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(match_operand:SI 4 "const_0_to_255_operand")]
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UNSPEC_FIXUPIMM)
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(match_dup 1)
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(const_int 1)))]
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"TARGET_AVX512F"
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"vfixupimm<ssescalarmodesuffix>\t{%4, %3, %2, %0|%0, %2, %3, %4}";
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[(set_attr "prefix" "evex")
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(set_attr "mode" "<ssescalarmode>")])
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(define_insn "avx512f_rndscale<mode>"
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(define_insn "avx512f_rndscale<mode>"
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[(set (match_operand:VF_512 0 "register_operand" "=v")
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[(set (match_operand:VF_512 0 "register_operand" "=v")
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(unspec:VF_512
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(unspec:VF_512
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[(match_operand:VF_512 1 "nonimmediate_operand" "vm")
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[(match_operand:VF_512 1 "nonimmediate_operand" "vm")
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(match_operand:SI 2 "const_0_to_255_operand")]
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(match_operand:SI 2 "const_0_to_255_operand")]
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UNSPEC_ROUND))]
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UNSPEC_ROUND))]
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"TARGET_AVX512F"
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"TARGET_AVX512F"
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"vrndscale<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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"vrndscale<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}"
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[(set_attr "length_immediate" "1")
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[(set_attr "length_immediate" "1")
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(set_attr "prefix" "evex")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(set_attr "mode" "<MODE>")])
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(define_insn "avx512f_rndscale<mode>"
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[(set (match_operand:VF_128 0 "register_operand" "=v")
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(vec_merge:VF_128
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(unspec:VF_128
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[(match_operand:VF_128 1 "register_operand" "v")
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(match_operand:VF_128 2 "nonimmediate_operand" "vm")
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(match_operand:SI 3 "const_0_to_255_operand")]
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UNSPEC_ROUND)
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(match_dup 1)
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(const_int 1)))]
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"TARGET_AVX512F"
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"vrndscale<ssescalarmodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}"
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[(set_attr "length_immediate" "1")
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(set_attr "prefix" "evex")
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(set_attr "mode" "<MODE>")])
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(define_expand "avx_shufpd256"
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(define_expand "avx_shufpd256"
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[(match_operand:V4DF 0 "register_operand")
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[(match_operand:V4DF 0 "register_operand")
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(match_operand:V4DF 1 "register_operand")
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(match_operand:V4DF 1 "register_operand")
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@ -10501,6 +10654,36 @@
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(set_attr "prefix" "evex")
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(set_attr "prefix" "evex")
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(set_attr "mode" "XI")])
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(set_attr "mode" "XI")])
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(define_insn "*avx512er_exp2<mode>"
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[(set (match_operand:VF_512 0 "register_operand" "=v")
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(unspec:VF_512
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[(match_operand:VF_512 1 "nonimmediate_operand" "vm")]
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||||||
|
UNSPEC_EXP2))]
|
||||||
|
"TARGET_AVX512ER"
|
||||||
|
"vexp2<ssemodesuffix>\t{%1, %0|%0, %1}"
|
||||||
|
[(set_attr "prefix" "evex")
|
||||||
|
(set_attr "mode" "<MODE>")])
|
||||||
|
|
||||||
|
(define_insn "*avx512er_rcp28<mode>"
|
||||||
|
[(set (match_operand:VF_512 0 "register_operand" "=v")
|
||||||
|
(unspec:VF_512
|
||||||
|
[(match_operand:VF_512 1 "nonimmediate_operand" "vm")]
|
||||||
|
UNSPEC_RCP28))]
|
||||||
|
"TARGET_AVX512ER"
|
||||||
|
"vrcp28<ssemodesuffix>\t{%1, %0|%0, %1}"
|
||||||
|
[(set_attr "prefix" "evex")
|
||||||
|
(set_attr "mode" "<MODE>")])
|
||||||
|
|
||||||
|
(define_insn "avx512er_rsqrt28<mode>"
|
||||||
|
[(set (match_operand:VF_512 0 "register_operand" "=v")
|
||||||
|
(unspec:VF_512
|
||||||
|
[(match_operand:VF_512 1 "nonimmediate_operand" "vm")]
|
||||||
|
UNSPEC_RSQRT28))]
|
||||||
|
"TARGET_AVX512ER"
|
||||||
|
"vrsqrt28<ssemodesuffix>\t{%1, %0|%0, %1}"
|
||||||
|
[(set_attr "prefix" "evex")
|
||||||
|
(set_attr "mode" "<MODE>")])
|
||||||
|
|
||||||
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
|
||||||
;;
|
;;
|
||||||
;; XOP instructions
|
;; XOP instructions
|
||||||
|
|
@ -12827,6 +13010,32 @@
|
||||||
(set_attr "prefix" "evex")
|
(set_attr "prefix" "evex")
|
||||||
(set_attr "mode" "<sseinsnmode>")])
|
(set_attr "mode" "<sseinsnmode>")])
|
||||||
|
|
||||||
|
(define_insn "avx512f_getmant<mode>"
|
||||||
|
[(set (match_operand:VF_512 0 "register_operand" "=v")
|
||||||
|
(unspec:VF_512
|
||||||
|
[(match_operand:VF_512 1 "nonimmediate_operand" "vm")
|
||||||
|
(match_operand:SI 2 "const_0_to_15_operand")]
|
||||||
|
UNSPEC_GETMANT))]
|
||||||
|
"TARGET_AVX512F"
|
||||||
|
"vgetmant<ssemodesuffix>\t{%2, %1, %0|%0, %1, %2}";
|
||||||
|
[(set_attr "prefix" "evex")
|
||||||
|
(set_attr "mode" "<MODE>")])
|
||||||
|
|
||||||
|
(define_insn "avx512f_getmant<mode>"
|
||||||
|
[(set (match_operand:VF_128 0 "register_operand" "=v")
|
||||||
|
(vec_merge:VF_128
|
||||||
|
(unspec:VF_128
|
||||||
|
[(match_operand:VF_128 1 "register_operand" "v")
|
||||||
|
(match_operand:VF_128 2 "nonimmediate_operand" "vm")
|
||||||
|
(match_operand:SI 3 "const_0_to_15_operand")]
|
||||||
|
UNSPEC_GETMANT)
|
||||||
|
(match_dup 1)
|
||||||
|
(const_int 1)))]
|
||||||
|
"TARGET_AVX512F"
|
||||||
|
"vgetmant<ssescalarmodesuffix>\t{%3, %2, %1, %0|%0, %1, %2, %3}";
|
||||||
|
[(set_attr "prefix" "evex")
|
||||||
|
(set_attr "mode" "<ssescalarmode>")])
|
||||||
|
|
||||||
(define_insn "clz<mode>2"
|
(define_insn "clz<mode>2"
|
||||||
[(set (match_operand:VI48_512 0 "register_operand" "=v")
|
[(set (match_operand:VI48_512 0 "register_operand" "=v")
|
||||||
(clz:VI48_512
|
(clz:VI48_512
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue