mirror of git://gcc.gnu.org/git/gcc.git
S/390: Enable vrepi constants.
gcc/testsuite/ChangeLog:
2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* gcc.target/s390/vector/vec-vrepi-1.c: New test.
gcc/ChangeLog:
2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* config/s390/constraints.md ("jKK"): New constraint.
* config/s390/s390.c (tm-constrs.h): Include for
satisfies_constraint_*.
(s390_legitimate_constant_p): Allow jKK constants. Use
satisfies_constraint_* also for the others.
(legitimate_reload_vector_constant_p): Likewise.
(print_operand): Allow h output modifier on vectors.
* config/s390/vector.md ("mov<mode>"): Add vrepi.
From-SVN: r231154
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@ -1,3 +1,14 @@
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2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* config/s390/constraints.md ("jKK"): New constraint.
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* config/s390/s390.c (tm-constrs.h): Include for
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satisfies_constraint_*.
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(s390_legitimate_constant_p): Allow jKK constants. Use
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satisfies_constraint_* also for the others.
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(legitimate_reload_vector_constant_p): Likewise.
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(print_operand): Allow h output modifier on vectors.
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* config/s390/vector.md ("mov<mode>"): Add vrepi.
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2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* config/s390/vector.md ("*vec_splats<mode>"): Fix constraint
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@ -34,6 +34,8 @@
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;; jm1: constant scalar or vector with all bits set
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;; jxx: contiguous bitmask of 0 or 1 in all vector elements
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;; jyy: constant consisting of byte chunks being either 0 or 0xff
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;; jKK: constant vector with all elements having the same value and
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;; matching K constraint
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;; t -- Access registers 36 and 37.
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;; v -- Vector registers v0-v31.
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;; C -- A signed 8-bit constant (-128..127)
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@ -108,23 +110,6 @@
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"FP_REGS"
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"Floating point registers")
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(define_constraint "j00"
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"Zero scalar or vector constant"
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(match_test "op == CONST0_RTX (GET_MODE (op))"))
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(define_constraint "jm1"
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"All one bit scalar or vector constant"
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(match_test "op == CONSTM1_RTX (GET_MODE (op))"))
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(define_constraint "jxx"
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"@internal"
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(and (match_code "const_vector")
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(match_test "s390_contiguous_bitmask_vector_p (op, NULL, NULL)")))
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(define_constraint "jyy"
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"@internal"
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(and (match_code "const_vector")
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(match_test "s390_bytemask_vector_p (op, NULL)")))
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(define_register_constraint "t"
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"ACCESS_REGS"
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@ -402,6 +387,33 @@
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(match_test "s390_O_constraint_str ('n', ival)")))
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;;
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;; Vector constraints follow.
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;;
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(define_constraint "j00"
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"Zero scalar or vector constant"
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(match_test "op == CONST0_RTX (GET_MODE (op))"))
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(define_constraint "jm1"
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"All one bit scalar or vector constant"
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(match_test "op == CONSTM1_RTX (GET_MODE (op))"))
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(define_constraint "jxx"
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"@internal"
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(and (match_code "const_vector")
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(match_test "s390_contiguous_bitmask_vector_p (op, NULL, NULL)")))
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(define_constraint "jyy"
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"@internal"
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(and (match_code "const_vector")
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(match_test "s390_bytemask_vector_p (op, NULL)")))
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(define_constraint "jKK"
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"@internal"
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(and (and (match_code "const_vector")
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(match_test "const_vec_duplicate_p (op)"))
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(match_test "satisfies_constraint_K (XVECEXP (op, 0, 0))")))
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;;
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@ -74,6 +74,7 @@ along with GCC; see the file COPYING3. If not see
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#include "builtins.h"
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#include "rtl-iter.h"
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#include "intl.h"
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#include "tm-constrs.h"
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/* This file should be included last. */
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#include "target-def.h"
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@ -3643,9 +3644,11 @@ s390_legitimate_constant_p (machine_mode mode, rtx op)
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if (GET_MODE_SIZE (mode) != 16)
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return 0;
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if (!const0_operand (op, mode)
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&& !s390_contiguous_bitmask_vector_p (op, NULL, NULL)
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&& !s390_bytemask_vector_p (op, NULL))
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if (!satisfies_constraint_j00 (op)
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&& !satisfies_constraint_jm1 (op)
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&& !satisfies_constraint_jKK (op)
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&& !satisfies_constraint_jxx (op)
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&& !satisfies_constraint_jyy (op))
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return 0;
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}
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@ -3826,14 +3829,12 @@ legitimate_reload_fp_constant_p (rtx op)
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static bool
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legitimate_reload_vector_constant_p (rtx op)
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{
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/* FIXME: Support constant vectors with all the same 16 bit unsigned
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operands. These can be loaded with vrepi. */
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if (TARGET_VX && GET_MODE_SIZE (GET_MODE (op)) == 16
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&& (const0_operand (op, GET_MODE (op))
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|| constm1_operand (op, GET_MODE (op))
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|| s390_contiguous_bitmask_vector_p (op, NULL, NULL)
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|| s390_bytemask_vector_p (op, NULL)))
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&& (satisfies_constraint_j00 (op)
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|| satisfies_constraint_jm1 (op)
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|| satisfies_constraint_jKK (op)
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|| satisfies_constraint_jxx (op)
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|| satisfies_constraint_jyy (op)))
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return true;
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return false;
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@ -7132,6 +7133,11 @@ print_operand (FILE *file, rtx x, int code)
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case CONST_VECTOR:
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switch (code)
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{
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case 'h':
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gcc_assert (const_vec_duplicate_p (x));
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fprintf (file, HOST_WIDE_INT_PRINT_DEC,
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((INTVAL (XVECEXP (x, 0, 0)) & 0xffff) ^ 0x8000) - 0x8000);
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break;
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case 'e':
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case 's':
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{
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@ -137,8 +137,8 @@
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; Full HW vector size moves
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(define_insn "mov<mode>"
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[(set (match_operand:V_128 0 "nonimmediate_operand" "=v, v,QR, v, v, v, v,v,d")
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(match_operand:V_128 1 "general_operand" " v,QR, v,j00,jm1,jyy,jxx,d,v"))]
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[(set (match_operand:V_128 0 "nonimmediate_operand" "=v, v,QR, v, v, v, v, v,v,d")
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(match_operand:V_128 1 "general_operand" " v,QR, v,j00,jm1,jyy,jxx,jKK,d,v"))]
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"TARGET_VX"
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"@
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vlr\t%v0,%v1
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@ -148,9 +148,10 @@
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vone\t%v0
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vgbm\t%v0,%t1
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vgm<bhfgq>\t%v0,%s1,%e1
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vrepi<bhfgq>\t%v0,%h1
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vlvgp\t%v0,%1,%N1
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#"
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[(set_attr "op_type" "VRR,VRX,VRX,VRI,VRI,VRI,VRI,VRR,*")])
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[(set_attr "op_type" "VRR,VRX,VRX,VRI,VRI,VRI,VRI,VRI,VRR,*")])
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(define_split
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[(set (match_operand:V_128 0 "register_operand" "")
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@ -1,3 +1,7 @@
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2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* gcc.target/s390/vector/vec-vrepi-1.c: New test.
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2015-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
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* gcc.target/s390/zvector/vec-splat-1.c: New test.
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@ -0,0 +1,58 @@
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/* { dg-do run } */
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/* { dg-options "-O3 -mzarch -march=z13 --save-temps" } */
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/* { dg-require-effective-target vector } */
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typedef unsigned char uv16qi __attribute__((vector_size(16)));
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typedef unsigned short uv8hi __attribute__((vector_size(16)));
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typedef unsigned int uv4si __attribute__((vector_size(16)));
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typedef unsigned long long uv2di __attribute__((vector_size(16)));
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uv2di __attribute__((noinline))
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foo1 ()
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{
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return (uv2di){ 0x7f0f, 0x7f0f };
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}
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/* { dg-final { scan-assembler-times "vrepig\t%v24,32527" 1 } } */
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uv4si __attribute__((noinline))
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foo2 ()
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{
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return (uv4si){ 0x7f0f, 0x7f0f, 0x7f0f, 0x7f0f };
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}
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/* { dg-final { scan-assembler-times "vrepif\t%v24,32527" 1 } } */
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uv8hi __attribute__((noinline))
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foo3 ()
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{
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return (uv8hi){ 0x7f0f, 0x7f0f, 0x7f0f, 0x7f0f,
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0x7f0f, 0x7f0f, 0x7f0f, 0x7f0f };
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}
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/* { dg-final { scan-assembler-times "vrepih\t%v24,32527" 1 } } */
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uv16qi __attribute__((noinline))
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foo4 ()
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{
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return (uv16qi){ 0x77, 0x77, 0x77, 0x77,
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0x77, 0x77, 0x77, 0x77,
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0x77, 0x77, 0x77, 0x77,
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0x77, 0x77, 0x77, 0x77 };
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}
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/* { dg-final { scan-assembler-times "vrepib\t%v24,119" 1 } } */
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int
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main ()
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{
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if (foo1()[1] != 0x7f0f)
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__builtin_abort ();
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if (foo2()[1] != 0x7f0f)
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__builtin_abort ();
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if (foo3()[1] != 0x7f0f)
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__builtin_abort ();
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if (foo4()[1] != 0x77)
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__builtin_abort ();
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return 0;
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}
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