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i386.h (LIMIT_RELOAD_CLASS): Return preferred single unit register class for classes that contain registers...
* config/i386/i386.h (LIMIT_RELOAD_CLASS): Return preferred single unit register class for classes that contain registers form multiple units. (REG_CLASS_CONTENTS): Add missing "frame" register to FLOAT_INT_REGS, INT_SSE_REGS and FLOAT_INT_SSE_REGS register classes. testsuite/ChangeLog: * gcc.c-torture/compile/20120727-1.c (dg-options): Add -mfpmath=387 for x86 targets. * gcc.c-torture/compile/20120727-2.c: New test. From-SVN: r190261
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@ -1,3 +1,11 @@
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2012-08-09 Uros Bizjak <ubizjak@gmail.com>
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* config/i386/i386.h (LIMIT_RELOAD_CLASS): Return preferred
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single unit register class for classes that contain registers form
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multiple units.
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(REG_CLASS_CONTENTS): Add missing "frame" register to FLOAT_INT_REGS,
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INT_SSE_REGS and FLOAT_INT_SSE_REGS register classes.
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2012-08-09 Martin Jambor <mjambor@suse.cz>
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* cgraph.h (cgraph_indirect_call_info): Field anc_offse renamd to
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@ -36,8 +44,7 @@
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preserved.
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(compute_complex_ancestor_jump_func): Likewise.
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(compute_scalar_jump_functions): Removed.
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(type_like_member_ptr_p): Also check field position are known and
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sane.
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(type_like_member_ptr_p): Also check field position are known and sane.
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(compute_pass_through_member_ptrs): Removed.
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(determine_cst_member_ptr): Likewise.
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(ipa_known_agg_contents_list): New type.
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@ -80,7 +87,8 @@
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* config/sh/sync.md (atomic_test_and_set): Pass gen_t_reg_rtx to
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gen_movnegt.
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* config/sh/sh.c (expand_cbranchsi4, sh_emit_scc_to_t,
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sh_emit_compare_and_branch, sh_emit_compare_and_set): Use get_t_reg_rtx.
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sh_emit_compare_and_branch, sh_emit_compare_and_set): Use
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get_t_reg_rtx.
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(sh_expand_t_scc): Pass gen_t_reg_rtx to gen_movnegt.
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2012-08-09 Oleg Endo <olegendo@gcc.gnu.org>
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@ -1298,9 +1298,9 @@ enum reg_class
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{ 0x1fe00100,0x1fe000 }, /* FP_TOP_SSE_REG */ \
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{ 0x1fe00200,0x1fe000 }, /* FP_SECOND_SSE_REG */ \
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{ 0x1fe0ff00,0x1fe000 }, /* FLOAT_SSE_REGS */ \
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{ 0x1ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \
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{ 0x1fe100ff,0x1fffe0 }, /* INT_SSE_REGS */ \
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{ 0x1fe1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \
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{ 0x11ffff, 0x1fe0 }, /* FLOAT_INT_REGS */ \
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{ 0x1ff100ff,0x1fffe0 }, /* INT_SSE_REGS */ \
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{ 0x1ff1ffff,0x1fffe0 }, /* FLOAT_INT_SSE_REGS */ \
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{ 0xffffffff,0x1fffff } \
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}
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@ -1378,14 +1378,27 @@ enum reg_class
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/* Place additional restrictions on the register class to use when it
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is necessary to be able to hold a value of mode MODE in a reload
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register for which class CLASS would ordinarily be used. */
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register for which class CLASS would ordinarily be used.
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#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
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((MODE) == QImode && !TARGET_64BIT \
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&& ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS \
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|| (CLASS) == LEGACY_REGS || (CLASS) == INDEX_REGS) \
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? Q_REGS \
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: (CLASS) == INT_SSE_REGS ? GENERAL_REGS : (CLASS))
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We avoid classes containing registers from multiple units due to
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the limitation in ix86_secondary_memory_needed. We limit these
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classes to their "natural mode" single unit register class, depending
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on the unit availability.
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Please note that reg_class_subset_p is not commutative, so these
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conditions mean "... if (CLASS) includes ALL registers from the
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register set." */
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#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
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(((MODE) == QImode && !TARGET_64BIT \
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&& reg_class_subset_p (Q_REGS, (CLASS))) ? Q_REGS \
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: (((MODE) == SImode || (MODE) == DImode) \
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&& reg_class_subset_p (GENERAL_REGS, (CLASS))) ? GENERAL_REGS \
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: (SSE_FLOAT_MODE_P (MODE) && TARGET_SSE_MATH \
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&& reg_class_subset_p (SSE_REGS, (CLASS))) ? SSE_REGS \
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: (X87_FLOAT_MODE_P (MODE) \
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&& reg_class_subset_p (FLOAT_REGS, (CLASS))) ? FLOAT_REGS \
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: (CLASS))
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/* If we are copying between general and FP registers, we need a memory
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location. The same is true for SSE and MMX registers. */
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@ -1,3 +1,9 @@
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2012-08-09 Uros Bizjak <ubizjak@gmail.com>
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* gcc.c-torture/compile/20120727-1.c (dg-options): Add -mfpmath=387
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for x86 targets.
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* gcc.c-torture/compile/20120727-2.c: New test.
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2012-08-09 Martin Jambor <mjambor@suse.cz>
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* gcc.dg/ipa/iinline-4.c: New test.
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@ -26,7 +32,7 @@
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2012-08-09 Andrey Belevantsev <abel@ispras.ru>
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PR rtl-optimization/53701
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* gcc.dg/pr53701.c: New test.
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* gcc.dg/pr53701.c: New test.
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2012-08-09 Bernd Schmidt <bernds@codesourcery.com>
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@ -39,8 +45,7 @@
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2012-08-08 H.J. Lu <hongjiu.lu@intel.com>
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* gcc.dg/tree-ssa/slsr-30.c: Require non-ilp32. Remove
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dg-skip-if.
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* gcc.dg/tree-ssa/slsr-30.c: Require non-ilp32. Remove dg-skip-if.
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2012-08-08 Joseph Myers <joseph@codesourcery.com>
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@ -1,3 +1,5 @@
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/* { dg-options "-mfpmath=387" { target { i?86-*-* x86_64-*-* } } } */
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union {
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char *p;
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float f;
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@ -7,5 +9,5 @@ void
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f (void)
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{
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u.p = "";
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u.f += 1.1;
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u.f += 1.1f;
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}
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@ -0,0 +1,13 @@
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/* { dg-options "-mfpmath=387" { target { i?86-*-* x86_64-*-* } } } */
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union {
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char *p;
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double d;
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} u;
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void
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f (void)
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{
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u.p = "";
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u.d += 1.1;
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}
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