mirror of git://gcc.gnu.org/git/gcc.git
[ARM][testsuite] Add missing guards to fp16 AdvSIMD tests
2016-06-27 Christophe Lyon <christophe.lyon@linaro.org> * gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add ifdef around fp16 code. * gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c: Add arm_neon_fp16_ok effective target. * gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c: Likewise. From-SVN: r237798
This commit is contained in:
Christophe Lyon
Christophe Lyon
parent
74a1b6ffef
commit
b65ffc7953
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@ -1,3 +1,25 @@
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2016-06-27 Christophe Lyon <christophe.lyon@linaro.org>
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* gcc.target/aarch64/advsimd-intrinsics/vget_lane.c: Add ifdef
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around fp16 code.
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* gcc.target/aarch64/advsimd-intrinsics/vreinterpret.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p128.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vreinterpret_p64.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vstX_lane.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vld2_lane_f16_indices_1.c:
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Add arm_neon_fp16_ok effective target.
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* gcc.target/aarch64/advsimd-intrinsics/vld2q_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vld3_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vld3q_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vld4_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vld4q_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vst2_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vst2q_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vst3_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vst3q_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vst4_lane_f16_indices_1.c: Likewise.
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* gcc.target/aarch64/advsimd-intrinsics/vst4q_lane_f16_indices_1.c: Likewise.
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2016-06-26 Jan Hubicka <hubicka@ucw.cz>
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* gcc.dg/predict-12.c: New testcase.
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@ -54,10 +54,12 @@ void exec_vget_lane (void)
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uint32_t var_int32;
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float32_t var_float32;
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} var_int32_float32;
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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union {
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uint16_t var_int16;
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float16_t var_float16;
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} var_int16_float16;
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#endif
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#define TEST_VGET_LANE_FP(Q, T1, T2, W, N, L) \
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VAR(var, T1, W) = vget##Q##_lane_##T2##W(VECT_VAR(vector, T1, W, N), L); \
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@ -2,6 +2,7 @@
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/* { dg-do compile } */
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/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
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/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
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float16x4x2_t
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f_vld2_lane_f16 (float16_t * p, float16x4x2_t v)
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@ -2,6 +2,7 @@
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/* { dg-do compile } */
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/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
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/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
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float16x8x2_t
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f_vld2q_lane_f16 (float16_t * p, float16x8x2_t v)
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@ -2,6 +2,7 @@
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/* { dg-do compile } */
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/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
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/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
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float16x4x3_t
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f_vld3_lane_f16 (float16_t * p, float16x4x3_t v)
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@ -2,6 +2,7 @@
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/* { dg-do compile } */
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/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
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/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
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float16x8x3_t
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f_vld3q_lane_f16 (float16_t * p, float16x8x3_t v)
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@ -2,6 +2,7 @@
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/* { dg-do compile } */
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/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
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/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
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float16x4x4_t
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f_vld4_lane_f16 (float16_t * p, float16x4x4_t v)
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@ -2,6 +2,7 @@
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/* { dg-do compile } */
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/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
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/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
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float16x8x4_t
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f_vld4q_lane_f16 (float16_t * p, float16x8x4_t v)
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@ -665,9 +665,11 @@ void exec_vreinterpret (void)
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/* Initialize input "vector" from "buffer". */
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TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vector, buffer);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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VLOAD(vector, buffer, , float, f, 16, 4);
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VLOAD(vector, buffer, , float, f, 32, 2);
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VLOAD(vector, buffer, q, float, f, 16, 8);
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#endif
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VLOAD(vector, buffer, , float, f, 32, 2);
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VLOAD(vector, buffer, q, float, f, 32, 4);
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/* vreinterpret_s8_xx. */
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@ -680,7 +682,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(, int, s, 8, 8, uint, u, 64, 1, expected_s8_7);
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TEST_VREINTERPRET(, int, s, 8, 8, poly, p, 8, 8, expected_s8_8);
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TEST_VREINTERPRET(, int, s, 8, 8, poly, p, 16, 4, expected_s8_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(, int, s, 8, 8, float, f, 16, 4, expected_s8_10);
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#endif
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/* vreinterpret_s16_xx. */
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TEST_VREINTERPRET(, int, s, 16, 4, int, s, 8, 8, expected_s16_1);
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@ -692,7 +696,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(, int, s, 16, 4, uint, u, 64, 1, expected_s16_7);
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TEST_VREINTERPRET(, int, s, 16, 4, poly, p, 8, 8, expected_s16_8);
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TEST_VREINTERPRET(, int, s, 16, 4, poly, p, 16, 4, expected_s16_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(, int, s, 16, 4, float, f, 16, 4, expected_s16_10);
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#endif
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/* vreinterpret_s32_xx. */
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TEST_VREINTERPRET(, int, s, 32, 2, int, s, 8, 8, expected_s32_1);
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@ -704,7 +710,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(, int, s, 32, 2, uint, u, 64, 1, expected_s32_7);
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TEST_VREINTERPRET(, int, s, 32, 2, poly, p, 8, 8, expected_s32_8);
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TEST_VREINTERPRET(, int, s, 32, 2, poly, p, 16, 4, expected_s32_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(, int, s, 32, 2, float, f, 16, 4, expected_s32_10);
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#endif
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/* vreinterpret_s64_xx. */
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TEST_VREINTERPRET(, int, s, 64, 1, int, s, 8, 8, expected_s64_1);
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@ -716,7 +724,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(, int, s, 64, 1, uint, u, 64, 1, expected_s64_7);
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TEST_VREINTERPRET(, int, s, 64, 1, poly, p, 8, 8, expected_s64_8);
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TEST_VREINTERPRET(, int, s, 64, 1, poly, p, 16, 4, expected_s64_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(, int, s, 64, 1, float, f, 16, 4, expected_s64_10);
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#endif
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/* vreinterpret_u8_xx. */
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TEST_VREINTERPRET(, uint, u, 8, 8, int, s, 8, 8, expected_u8_1);
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@ -728,7 +738,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(, uint, u, 8, 8, uint, u, 64, 1, expected_u8_7);
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TEST_VREINTERPRET(, uint, u, 8, 8, poly, p, 8, 8, expected_u8_8);
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TEST_VREINTERPRET(, uint, u, 8, 8, poly, p, 16, 4, expected_u8_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(, uint, u, 8, 8, float, f, 16, 4, expected_u8_10);
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#endif
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/* vreinterpret_u16_xx. */
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TEST_VREINTERPRET(, uint, u, 16, 4, int, s, 8, 8, expected_u16_1);
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@ -740,7 +752,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(, uint, u, 16, 4, uint, u, 64, 1, expected_u16_7);
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TEST_VREINTERPRET(, uint, u, 16, 4, poly, p, 8, 8, expected_u16_8);
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TEST_VREINTERPRET(, uint, u, 16, 4, poly, p, 16, 4, expected_u16_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(, uint, u, 16, 4, float, f, 16, 4, expected_u16_10);
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#endif
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/* vreinterpret_u32_xx. */
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TEST_VREINTERPRET(, uint, u, 32, 2, int, s, 8, 8, expected_u32_1);
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@ -752,7 +766,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(, uint, u, 32, 2, uint, u, 64, 1, expected_u32_7);
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TEST_VREINTERPRET(, uint, u, 32, 2, poly, p, 8, 8, expected_u32_8);
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TEST_VREINTERPRET(, uint, u, 32, 2, poly, p, 16, 4, expected_u32_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(, uint, u, 32, 2, float, f, 16, 4, expected_u32_10);
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#endif
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/* vreinterpret_u64_xx. */
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TEST_VREINTERPRET(, uint, u, 64, 1, int, s, 8, 8, expected_u64_1);
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@ -764,7 +780,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(, uint, u, 64, 1, uint, u, 32, 2, expected_u64_7);
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TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 8, 8, expected_u64_8);
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TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 16, 4, expected_u64_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(, uint, u, 64, 1, float, f, 16, 4, expected_u64_10);
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#endif
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/* vreinterpret_p8_xx. */
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TEST_VREINTERPRET_POLY(, poly, p, 8, 8, int, s, 8, 8, expected_p8_1);
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@ -776,7 +794,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET_POLY(, poly, p, 8, 8, uint, u, 32, 2, expected_p8_7);
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TEST_VREINTERPRET_POLY(, poly, p, 8, 8, uint, u, 64, 1, expected_p8_8);
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TEST_VREINTERPRET_POLY(, poly, p, 8, 8, poly, p, 16, 4, expected_p8_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET_POLY(, poly, p, 8, 8, float, f, 16, 4, expected_p8_10);
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#endif
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/* vreinterpret_p16_xx. */
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TEST_VREINTERPRET_POLY(, poly, p, 16, 4, int, s, 8, 8, expected_p16_1);
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TEST_VREINTERPRET_POLY(, poly, p, 16, 4, uint, u, 32, 2, expected_p16_7);
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TEST_VREINTERPRET_POLY(, poly, p, 16, 4, uint, u, 64, 1, expected_p16_8);
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TEST_VREINTERPRET_POLY(, poly, p, 16, 4, poly, p, 8, 8, expected_p16_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET_POLY(, poly, p, 16, 4, float, f, 16, 4, expected_p16_10);
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#endif
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/* vreinterpretq_s8_xx. */
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TEST_VREINTERPRET(q, int, s, 8, 16, int, s, 16, 8, expected_q_s8_1);
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TEST_VREINTERPRET(q, int, s, 8, 16, uint, u, 64, 2, expected_q_s8_7);
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TEST_VREINTERPRET(q, int, s, 8, 16, poly, p, 8, 16, expected_q_s8_8);
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TEST_VREINTERPRET(q, int, s, 8, 16, poly, p, 16, 8, expected_q_s8_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(q, int, s, 8, 16, float, f, 16, 8, expected_q_s8_10);
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#endif
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/* vreinterpretq_s16_xx. */
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TEST_VREINTERPRET(q, int, s, 16, 8, int, s, 8, 16, expected_q_s16_1);
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TEST_VREINTERPRET(q, int, s, 16, 8, uint, u, 64, 2, expected_q_s16_7);
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TEST_VREINTERPRET(q, int, s, 16, 8, poly, p, 8, 16, expected_q_s16_8);
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TEST_VREINTERPRET(q, int, s, 16, 8, poly, p, 16, 8, expected_q_s16_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(q, int, s, 16, 8, float, f, 16, 8, expected_q_s16_10);
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#endif
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/* vreinterpretq_s32_xx. */
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TEST_VREINTERPRET(q, int, s, 32, 4, int, s, 8, 16, expected_q_s32_1);
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@ -824,7 +850,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(q, int, s, 32, 4, uint, u, 64, 2, expected_q_s32_7);
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TEST_VREINTERPRET(q, int, s, 32, 4, poly, p, 8, 16, expected_q_s32_8);
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TEST_VREINTERPRET(q, int, s, 32, 4, poly, p, 16, 8, expected_q_s32_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(q, int, s, 32, 4, float, f, 16, 8, expected_q_s32_10);
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#endif
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/* vreinterpretq_s64_xx. */
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TEST_VREINTERPRET(q, int, s, 64, 2, int, s, 8, 16, expected_q_s64_1);
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TEST_VREINTERPRET(q, int, s, 64, 2, uint, u, 64, 2, expected_q_s64_7);
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TEST_VREINTERPRET(q, int, s, 64, 2, poly, p, 8, 16, expected_q_s64_8);
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TEST_VREINTERPRET(q, int, s, 64, 2, poly, p, 16, 8, expected_q_s64_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(q, int, s, 64, 2, float, f, 16, 8, expected_q_s64_10);
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#endif
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/* vreinterpretq_u8_xx. */
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TEST_VREINTERPRET(q, uint, u, 8, 16, int, s, 8, 16, expected_q_u8_1);
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@ -848,7 +878,9 @@ void exec_vreinterpret (void)
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TEST_VREINTERPRET(q, uint, u, 8, 16, uint, u, 64, 2, expected_q_u8_7);
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TEST_VREINTERPRET(q, uint, u, 8, 16, poly, p, 8, 16, expected_q_u8_8);
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TEST_VREINTERPRET(q, uint, u, 8, 16, poly, p, 16, 8, expected_q_u8_9);
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#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
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TEST_VREINTERPRET(q, uint, u, 8, 16, float, f, 16, 8, expected_q_u8_10);
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#endif
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/* vreinterpretq_u16_xx. */
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TEST_VREINTERPRET(q, uint, u, 16, 8, int, s, 8, 16, expected_q_u16_1);
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@ -860,7 +892,9 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET(q, uint, u, 16, 8, uint, u, 64, 2, expected_q_u16_7);
|
||||
TEST_VREINTERPRET(q, uint, u, 16, 8, poly, p, 8, 16, expected_q_u16_8);
|
||||
TEST_VREINTERPRET(q, uint, u, 16, 8, poly, p, 16, 8, expected_q_u16_9);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET(q, uint, u, 16, 8, float, f, 16, 8, expected_q_u16_10);
|
||||
#endif
|
||||
|
||||
/* vreinterpretq_u32_xx. */
|
||||
TEST_VREINTERPRET(q, uint, u, 32, 4, int, s, 8, 16, expected_q_u32_1);
|
||||
|
|
@ -872,7 +906,9 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET(q, uint, u, 32, 4, uint, u, 64, 2, expected_q_u32_7);
|
||||
TEST_VREINTERPRET(q, uint, u, 32, 4, poly, p, 8, 16, expected_q_u32_8);
|
||||
TEST_VREINTERPRET(q, uint, u, 32, 4, poly, p, 16, 8, expected_q_u32_9);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET(q, uint, u, 32, 4, float, f, 16, 8, expected_q_u32_10);
|
||||
#endif
|
||||
|
||||
/* vreinterpretq_u64_xx. */
|
||||
TEST_VREINTERPRET(q, uint, u, 64, 2, int, s, 8, 16, expected_q_u64_1);
|
||||
|
|
@ -884,7 +920,9 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET(q, uint, u, 64, 2, uint, u, 32, 4, expected_q_u64_7);
|
||||
TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 8, 16, expected_q_u64_8);
|
||||
TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 16, 8, expected_q_u64_9);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET(q, uint, u, 64, 2, float, f, 16, 8, expected_q_u64_10);
|
||||
#endif
|
||||
|
||||
/* vreinterpretq_p8_xx. */
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, int, s, 8, 16, expected_q_p8_1);
|
||||
|
|
@ -896,7 +934,9 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, uint, u, 32, 4, expected_q_p8_7);
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, uint, u, 64, 2, expected_q_p8_8);
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, poly, p, 16, 8, expected_q_p8_9);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, float, f, 16, 8, expected_q_p8_10);
|
||||
#endif
|
||||
|
||||
/* vreinterpretq_p16_xx. */
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, int, s, 8, 16, expected_q_p16_1);
|
||||
|
|
@ -908,7 +948,9 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, uint, u, 32, 4, expected_q_p16_7);
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, uint, u, 64, 2, expected_q_p16_8);
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, poly, p, 8, 16, expected_q_p16_9);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, float, f, 16, 8, expected_q_p16_10);
|
||||
#endif
|
||||
|
||||
/* vreinterpret_f32_xx. */
|
||||
TEST_VREINTERPRET_FP(, float, f, 32, 2, int, s, 8, 8, expected_f32_1);
|
||||
|
|
@ -921,7 +963,9 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET_FP(, float, f, 32, 2, uint, u, 64, 1, expected_f32_8);
|
||||
TEST_VREINTERPRET_FP(, float, f, 32, 2, poly, p, 8, 8, expected_f32_9);
|
||||
TEST_VREINTERPRET_FP(, float, f, 32, 2, poly, p, 16, 4, expected_f32_10);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_FP(, float, f, 32, 2, float, f, 16, 4, expected_f32_11);
|
||||
#endif
|
||||
|
||||
/* vreinterpretq_f32_xx. */
|
||||
TEST_VREINTERPRET_FP(q, float, f, 32, 4, int, s, 8, 16, expected_q_f32_1);
|
||||
|
|
@ -934,7 +978,9 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET_FP(q, float, f, 32, 4, uint, u, 64, 2, expected_q_f32_8);
|
||||
TEST_VREINTERPRET_FP(q, float, f, 32, 4, poly, p, 8, 16, expected_q_f32_9);
|
||||
TEST_VREINTERPRET_FP(q, float, f, 32, 4, poly, p, 16, 8, expected_q_f32_10);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_FP(q, float, f, 32, 4, float, f, 16, 8, expected_q_f32_11);
|
||||
#endif
|
||||
|
||||
/* vreinterpret_xx_f32. */
|
||||
TEST_VREINTERPRET(, int, s, 8, 8, float, f, 32, 2, expected_xx_f32_1);
|
||||
|
|
@ -947,7 +993,9 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET(, uint, u, 64, 1, float, f, 32, 2, expected_xx_f32_8);
|
||||
TEST_VREINTERPRET_POLY(, poly, p, 8, 8, float, f, 32, 2, expected_xx_f32_9);
|
||||
TEST_VREINTERPRET_POLY(, poly, p, 16, 4, float, f, 32, 2, expected_xx_f32_10);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_FP(, float, f, 16, 4, float, f, 32, 2, expected_xx_f32_11);
|
||||
#endif
|
||||
|
||||
/* vreinterpretq_xx_f32. */
|
||||
TEST_VREINTERPRET(q, int, s, 8, 16, float, f, 32, 4, expected_q_xx_f32_1);
|
||||
|
|
@ -960,6 +1008,7 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET(q, uint, u, 64, 2, float, f, 32, 4, expected_q_xx_f32_8);
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 8, 16, float, f, 32, 4, expected_q_xx_f32_9);
|
||||
TEST_VREINTERPRET_POLY(q, poly, p, 16, 8, float, f, 32, 4, expected_q_xx_f32_10);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_FP(q, float, f, 16, 8, float, f, 32, 4, expected_q_xx_f32_11);
|
||||
|
||||
/* vreinterpret_f16_xx. */
|
||||
|
|
@ -985,6 +1034,7 @@ void exec_vreinterpret (void)
|
|||
TEST_VREINTERPRET_FP(q, float, f, 16, 8, uint, u, 64, 2, expected_q_f16_8);
|
||||
TEST_VREINTERPRET_FP(q, float, f, 16, 8, poly, p, 8, 16, expected_q_f16_9);
|
||||
TEST_VREINTERPRET_FP(q, float, f, 16, 8, poly, p, 16, 8, expected_q_f16_10);
|
||||
#endif
|
||||
}
|
||||
|
||||
int main (void)
|
||||
|
|
|
|||
|
|
@ -86,7 +86,9 @@ int main (void)
|
|||
|
||||
TEST_MACRO_128BITS_VARIANTS_2_5(VLOAD, vreint_vector, buffer);
|
||||
VLOAD(vreint_vector, buffer, q, poly, p, 64, 2);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
VLOAD(vreint_vector, buffer, q, float, f, 16, 8);
|
||||
#endif
|
||||
VLOAD(vreint_vector, buffer, q, float, f, 32, 4);
|
||||
|
||||
/* vreinterpretq_p128_* tests. */
|
||||
|
|
@ -115,7 +117,9 @@ int main (void)
|
|||
TEST_VREINTERPRET128(q, poly, p, 128, 1, uint, u, 64, 2, vreint_expected_q_p128_u64);
|
||||
TEST_VREINTERPRET128(q, poly, p, 128, 1, poly, p, 8, 16, vreint_expected_q_p128_p8);
|
||||
TEST_VREINTERPRET128(q, poly, p, 128, 1, poly, p, 16, 8, vreint_expected_q_p128_p16);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET128(q, poly, p, 128, 1, float, f, 16, 8, vreint_expected_q_p128_f16);
|
||||
#endif
|
||||
TEST_VREINTERPRET128(q, poly, p, 128, 1, float, f, 32, 4, vreint_expected_q_p128_f32);
|
||||
|
||||
/* vreinterpretq_*_p128 tests. */
|
||||
|
|
@ -153,7 +157,9 @@ int main (void)
|
|||
TEST_VREINTERPRET_FROM_P128(q, uint, u, 64, 2, poly, p, 128, 1, vreint_expected_q_u64_p128);
|
||||
TEST_VREINTERPRET_FROM_P128(q, poly, p, 8, 16, poly, p, 128, 1, vreint_expected_q_p8_p128);
|
||||
TEST_VREINTERPRET_FROM_P128(q, poly, p, 16, 8, poly, p, 128, 1, vreint_expected_q_p16_p128);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_FP_FROM_P128(q, float, f, 16, 8, poly, p, 128, 1, vreint_expected_q_f16_p128);
|
||||
#endif
|
||||
TEST_VREINTERPRET_FP_FROM_P128(q, float, f, 32, 4, poly, p, 128, 1, vreint_expected_q_f32_p128);
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -132,8 +132,10 @@ int main (void)
|
|||
TEST_MACRO_ALL_VARIANTS_2_5(VLOAD, vreint_vector, buffer);
|
||||
VLOAD(vreint_vector, buffer, , poly, p, 64, 1);
|
||||
VLOAD(vreint_vector, buffer, q, poly, p, 64, 2);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
VLOAD(vreint_vector, buffer, , float, f, 16, 4);
|
||||
VLOAD(vreint_vector, buffer, q, float, f, 16, 8);
|
||||
#endif
|
||||
VLOAD(vreint_vector, buffer, , float, f, 32, 2);
|
||||
VLOAD(vreint_vector, buffer, q, float, f, 32, 4);
|
||||
|
||||
|
|
@ -150,7 +152,9 @@ int main (void)
|
|||
TEST_VREINTERPRET(, poly, p, 64, 1, uint, u, 64, 1, vreint_expected_p64_u64);
|
||||
TEST_VREINTERPRET(, poly, p, 64, 1, poly, p, 8, 8, vreint_expected_p64_p8);
|
||||
TEST_VREINTERPRET(, poly, p, 64, 1, poly, p, 16, 4, vreint_expected_p64_p16);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET(, poly, p, 64, 1, float, f, 16, 4, vreint_expected_p64_f16);
|
||||
#endif
|
||||
TEST_VREINTERPRET(, poly, p, 64, 1, float, f, 32, 2, vreint_expected_p64_f32);
|
||||
|
||||
/* vreinterpretq_p64_* tests. */
|
||||
|
|
@ -166,7 +170,9 @@ int main (void)
|
|||
TEST_VREINTERPRET(q, poly, p, 64, 2, uint, u, 64, 2, vreint_expected_q_p64_u64);
|
||||
TEST_VREINTERPRET(q, poly, p, 64, 2, poly, p, 8, 16, vreint_expected_q_p64_p8);
|
||||
TEST_VREINTERPRET(q, poly, p, 64, 2, poly, p, 16, 8, vreint_expected_q_p64_p16);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET(q, poly, p, 64, 2, float, f, 16, 8, vreint_expected_q_p64_f16);
|
||||
#endif
|
||||
TEST_VREINTERPRET(q, poly, p, 64, 2, float, f, 32, 4, vreint_expected_q_p64_f32);
|
||||
|
||||
/* vreinterpret_*_p64 tests. */
|
||||
|
|
@ -183,7 +189,9 @@ int main (void)
|
|||
TEST_VREINTERPRET(, uint, u, 64, 1, poly, p, 64, 1, vreint_expected_u64_p64);
|
||||
TEST_VREINTERPRET(, poly, p, 8, 8, poly, p, 64, 1, vreint_expected_p8_p64);
|
||||
TEST_VREINTERPRET(, poly, p, 16, 4, poly, p, 64, 1, vreint_expected_p16_p64);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_FP(, float, f, 16, 4, poly, p, 64, 1, vreint_expected_f16_p64);
|
||||
#endif
|
||||
TEST_VREINTERPRET_FP(, float, f, 32, 2, poly, p, 64, 1, vreint_expected_f32_p64);
|
||||
TEST_VREINTERPRET(q, int, s, 8, 16, poly, p, 64, 2, vreint_expected_q_s8_p64);
|
||||
TEST_VREINTERPRET(q, int, s, 16, 8, poly, p, 64, 2, vreint_expected_q_s16_p64);
|
||||
|
|
@ -195,7 +203,9 @@ int main (void)
|
|||
TEST_VREINTERPRET(q, uint, u, 64, 2, poly, p, 64, 2, vreint_expected_q_u64_p64);
|
||||
TEST_VREINTERPRET(q, poly, p, 8, 16, poly, p, 64, 2, vreint_expected_q_p8_p64);
|
||||
TEST_VREINTERPRET(q, poly, p, 16, 8, poly, p, 64, 2, vreint_expected_q_p16_p64);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
TEST_VREINTERPRET_FP(q, float, f, 16, 8, poly, p, 64, 2, vreint_expected_q_f16_p64);
|
||||
#endif
|
||||
TEST_VREINTERPRET_FP(q, float, f, 32, 4, poly, p, 64, 2, vreint_expected_q_f32_p64);
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
|
||||
|
||||
void
|
||||
f_vst2_lane_f16 (float16_t * p, float16x4x2_t v)
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
|
||||
|
||||
void
|
||||
f_vst2q_lane_f16 (float16_t * p, float16x8x2_t v)
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
|
||||
|
||||
void
|
||||
f_vst3_lane_f16 (float16_t * p, float16x4x3_t v)
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
|
||||
|
||||
void
|
||||
f_vst3q_lane_f16 (float16_t * p, float16x8x3_t v)
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
|
||||
|
||||
void
|
||||
f_vst4_lane_f16 (float16_t * p, float16x4x4_t v)
|
||||
|
|
|
|||
|
|
@ -2,6 +2,7 @@
|
|||
|
||||
/* { dg-do compile } */
|
||||
/* { dg-skip-if "" { *-*-* } { "-fno-fat-lto-objects" } } */
|
||||
/* { dg-require-effective-target arm_neon_fp16_ok { target { arm*-*-* } } } */
|
||||
|
||||
void
|
||||
f_vst4q_lane_f16 (float16_t * p, float16x8x4_t v)
|
||||
|
|
|
|||
|
|
@ -256,7 +256,9 @@ VECT_VAR_DECL_INIT(buffer_vld2_lane, uint, 32, 2);
|
|||
VECT_VAR_DECL_INIT(buffer_vld2_lane, uint, 64, 2);
|
||||
VECT_VAR_DECL_INIT(buffer_vld2_lane, poly, 8, 2);
|
||||
VECT_VAR_DECL_INIT(buffer_vld2_lane, poly, 16, 2);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
VECT_VAR_DECL_INIT(buffer_vld2_lane, float, 16, 2);
|
||||
#endif
|
||||
VECT_VAR_DECL_INIT(buffer_vld2_lane, float, 32, 2);
|
||||
|
||||
/* Input buffers for vld3_lane. */
|
||||
|
|
@ -270,7 +272,9 @@ VECT_VAR_DECL_INIT(buffer_vld3_lane, uint, 32, 3);
|
|||
VECT_VAR_DECL_INIT(buffer_vld3_lane, uint, 64, 3);
|
||||
VECT_VAR_DECL_INIT(buffer_vld3_lane, poly, 8, 3);
|
||||
VECT_VAR_DECL_INIT(buffer_vld3_lane, poly, 16, 3);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
VECT_VAR_DECL_INIT(buffer_vld3_lane, float, 16, 3);
|
||||
#endif
|
||||
VECT_VAR_DECL_INIT(buffer_vld3_lane, float, 32, 3);
|
||||
|
||||
/* Input buffers for vld4_lane. */
|
||||
|
|
@ -284,7 +288,9 @@ VECT_VAR_DECL_INIT(buffer_vld4_lane, uint, 32, 4);
|
|||
VECT_VAR_DECL_INIT(buffer_vld4_lane, uint, 64, 4);
|
||||
VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 8, 4);
|
||||
VECT_VAR_DECL_INIT(buffer_vld4_lane, poly, 16, 4);
|
||||
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
|
||||
VECT_VAR_DECL_INIT(buffer_vld4_lane, float, 16, 4);
|
||||
#endif
|
||||
VECT_VAR_DECL_INIT(buffer_vld4_lane, float, 32, 4);
|
||||
|
||||
void exec_vstX_lane (void)
|
||||
|
|
|
|||
Loading…
Reference in New Issue