mirror of git://gcc.gnu.org/git/gcc.git
s390.c: Rename cfun_set_fpr_bit to cfun_set_fpr_save and cfun_fpr_bit_p to cfun_fpr_save_p.
2013-07-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com> * config/s390/s390.c: Rename cfun_set_fpr_bit to cfun_set_fpr_save and cfun_fpr_bit_p to cfun_fpr_save_p. (s390_frame_area, s390_register_info, s390_frame_info) (s390_emit_prologue, s390_emit_epilogue) (s390_conditional_register_usage): Use the *_REGNUM macros for FPR register numbers. * config/s390/s390.h: Define *_REGNUM macros for floating point register numbers. From-SVN: r200780
This commit is contained in:
Andreas Krebbel
Andreas Krebbel
parent
07f398aa89
commit
b89b22fc57
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@ -1,3 +1,14 @@
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2013-07-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
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* config/s390/s390.c: Rename cfun_set_fpr_bit to cfun_set_fpr_save
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and cfun_fpr_bit_p to cfun_fpr_save_p.
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(s390_frame_area, s390_register_info, s390_frame_info)
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(s390_emit_prologue, s390_emit_epilogue)
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(s390_conditional_register_usage): Use the *_REGNUM macros for FPR
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register numbers.
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* config/s390/s390.h: Define *_REGNUM macros for floating point
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register numbers.
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2013-07-08 Eric Botcazou <ebotcazou@adacore.com>
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* Makefile.in (tree-ssa-reassoc.o): Add dependency on $(PARAMS_H).
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@ -379,10 +379,10 @@ struct GTY(()) machine_function
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#define cfun_save_high_fprs_p (!!cfun_frame_layout.high_fprs)
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#define cfun_gprs_save_area_size ((cfun_frame_layout.last_save_gpr_slot - \
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cfun_frame_layout.first_save_gpr_slot + 1) * UNITS_PER_LONG)
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#define cfun_set_fpr_bit(BITNUM) (cfun->machine->frame_layout.fpr_bitmap |= \
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(1 << (BITNUM)))
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#define cfun_fpr_bit_p(BITNUM) (!!(cfun->machine->frame_layout.fpr_bitmap & \
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(1 << (BITNUM))))
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#define cfun_set_fpr_save(REGNO) (cfun->machine->frame_layout.fpr_bitmap |= \
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(1 << (REGNO - F0_REGNUM)))
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#define cfun_fpr_save_p(REGNO) (!!(cfun->machine->frame_layout.fpr_bitmap & \
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(1 << (REGNO - F0_REGNUM))))
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/* Number of GPRs and FPRs used for argument passing. */
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#define GP_ARG_NUM_REG 5
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@ -7451,7 +7451,6 @@ static void
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s390_frame_area (int *area_bottom, int *area_top)
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{
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int b, t;
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int i;
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b = INT_MAX;
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t = INT_MIN;
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@ -7472,13 +7471,18 @@ s390_frame_area (int *area_bottom, int *area_top)
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}
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if (!TARGET_64BIT)
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for (i = 2; i < 4; i++)
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if (cfun_fpr_bit_p (i))
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{
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if (cfun_fpr_save_p (F4_REGNUM))
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{
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b = MIN (b, cfun_frame_layout.f4_offset + (i - 2) * 8);
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t = MAX (t, cfun_frame_layout.f4_offset + (i - 1) * 8);
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b = MIN (b, cfun_frame_layout.f4_offset);
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t = MAX (t, cfun_frame_layout.f4_offset + 8);
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}
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if (cfun_fpr_save_p (F6_REGNUM))
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{
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b = MIN (b, cfun_frame_layout.f4_offset + 8);
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t = MAX (t, cfun_frame_layout.f4_offset + 16);
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}
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}
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*area_bottom = b;
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*area_top = t;
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}
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@ -7505,7 +7509,7 @@ s390_register_info (int clobbered_regs[])
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cfun_frame_layout.fpr_bitmap = 0;
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cfun_frame_layout.high_fprs = 0;
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if (TARGET_64BIT)
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for (i = 24; i < 32; i++)
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for (i = F8_REGNUM; i <= F15_REGNUM; i++)
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/* During reload we have to use the df_regs_ever_live infos
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since reload is marking FPRs used as spill slots there as
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live before actually making the code changes. Without
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@ -7517,7 +7521,7 @@ s390_register_info (int clobbered_regs[])
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|| crtl->saves_all_registers)))
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&& !global_regs[i])
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{
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cfun_set_fpr_bit (i - 16);
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cfun_set_fpr_save (i);
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cfun_frame_layout.high_fprs++;
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}
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}
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@ -7644,14 +7648,17 @@ s390_register_info (int clobbered_regs[])
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min_fpr = 0;
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for (i = min_fpr; i < max_fpr; i++)
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cfun_set_fpr_bit (i);
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cfun_set_fpr_save (i + F0_REGNUM);
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}
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}
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if (!TARGET_64BIT)
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for (i = 2; i < 4; i++)
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if (df_regs_ever_live_p (i + 16) && !global_regs[i + 16])
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cfun_set_fpr_bit (i);
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{
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if (df_regs_ever_live_p (F4_REGNUM) && !global_regs[F4_REGNUM])
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cfun_set_fpr_save (F4_REGNUM);
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if (df_regs_ever_live_p (F6_REGNUM) && !global_regs[F6_REGNUM])
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cfun_set_fpr_save (F6_REGNUM);
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}
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}
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/* Fill cfun->machine with info about frame of current function. */
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@ -7687,11 +7694,13 @@ s390_frame_info (void)
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{
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cfun_frame_layout.f4_offset
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= (cfun_frame_layout.gprs_offset
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- 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
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- 8 * (cfun_fpr_save_p (F4_REGNUM)
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+ cfun_fpr_save_p (F6_REGNUM)));
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cfun_frame_layout.f0_offset
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= (cfun_frame_layout.f4_offset
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- 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
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- 8 * (cfun_fpr_save_p (F0_REGNUM)
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+ cfun_fpr_save_p (F2_REGNUM)));
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}
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else
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{
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@ -7700,22 +7709,26 @@ s390_frame_info (void)
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cfun_frame_layout.f0_offset
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= ((cfun_frame_layout.gprs_offset
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& ~(STACK_BOUNDARY / BITS_PER_UNIT - 1))
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- 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
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- 8 * (cfun_fpr_save_p (F0_REGNUM)
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+ cfun_fpr_save_p (F2_REGNUM)));
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cfun_frame_layout.f4_offset
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= (cfun_frame_layout.f0_offset
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- 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
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- 8 * (cfun_fpr_save_p (F4_REGNUM)
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+ cfun_fpr_save_p (F6_REGNUM)));
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}
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}
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else /* no backchain */
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{
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cfun_frame_layout.f4_offset
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= (STACK_POINTER_OFFSET
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- 8 * (cfun_fpr_bit_p (2) + cfun_fpr_bit_p (3)));
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- 8 * (cfun_fpr_save_p (F4_REGNUM)
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+ cfun_fpr_save_p (F6_REGNUM)));
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cfun_frame_layout.f0_offset
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= (cfun_frame_layout.f4_offset
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- 8 * (cfun_fpr_bit_p (0) + cfun_fpr_bit_p (1)));
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- 8 * (cfun_fpr_save_p (F0_REGNUM)
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+ cfun_fpr_save_p (F2_REGNUM)));
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cfun_frame_layout.gprs_offset
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= cfun_frame_layout.f0_offset - cfun_gprs_save_area_size;
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@ -7747,8 +7760,8 @@ s390_frame_info (void)
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cfun_frame_layout.frame_size += cfun_frame_layout.high_fprs * 8;
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for (i = 0; i < 8; i++)
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if (cfun_fpr_bit_p (i))
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for (i = F0_REGNUM; i <= F7_REGNUM; i++)
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if (cfun_fpr_save_p (i))
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cfun_frame_layout.frame_size += 8;
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cfun_frame_layout.frame_size += cfun_gprs_save_area_size;
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@ -8453,11 +8466,11 @@ s390_emit_prologue (void)
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offset = cfun_frame_layout.f0_offset;
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/* Save f0 and f2. */
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for (i = 0; i < 2; i++)
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for (i = F0_REGNUM; i <= F0_REGNUM + 1; i++)
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{
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if (cfun_fpr_bit_p (i))
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if (cfun_fpr_save_p (i))
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{
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save_fpr (stack_pointer_rtx, offset, i + 16);
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save_fpr (stack_pointer_rtx, offset, i);
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offset += 8;
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}
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else if (!TARGET_PACKED_STACK)
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@ -8466,16 +8479,16 @@ s390_emit_prologue (void)
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/* Save f4 and f6. */
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offset = cfun_frame_layout.f4_offset;
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for (i = 2; i < 4; i++)
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for (i = F4_REGNUM; i <= F4_REGNUM + 1; i++)
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{
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if (cfun_fpr_bit_p (i))
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if (cfun_fpr_save_p (i))
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{
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insn = save_fpr (stack_pointer_rtx, offset, i + 16);
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insn = save_fpr (stack_pointer_rtx, offset, i);
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offset += 8;
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/* If f4 and f6 are call clobbered they are saved due to stdargs and
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therefore are not frame related. */
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if (!call_really_used_regs[i + 16])
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if (!call_really_used_regs[i])
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RTX_FRAME_RELATED_P (insn) = 1;
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}
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else if (!TARGET_PACKED_STACK)
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@ -8489,20 +8502,20 @@ s390_emit_prologue (void)
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offset = (cfun_frame_layout.f8_offset
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+ (cfun_frame_layout.high_fprs - 1) * 8);
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for (i = 15; i > 7 && offset >= 0; i--)
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if (cfun_fpr_bit_p (i))
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for (i = F15_REGNUM; i >= F8_REGNUM && offset >= 0; i--)
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if (cfun_fpr_save_p (i))
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{
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insn = save_fpr (stack_pointer_rtx, offset, i + 16);
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insn = save_fpr (stack_pointer_rtx, offset, i);
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RTX_FRAME_RELATED_P (insn) = 1;
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offset -= 8;
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}
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if (offset >= cfun_frame_layout.f8_offset)
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next_fpr = i + 16;
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next_fpr = i;
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}
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if (!TARGET_PACKED_STACK)
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next_fpr = cfun_save_high_fprs_p ? 31 : 0;
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next_fpr = cfun_save_high_fprs_p ? F15_REGNUM : 0;
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if (flag_stack_usage_info)
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current_function_static_stack_size = cfun_frame_layout.frame_size;
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@ -8647,8 +8660,8 @@ s390_emit_prologue (void)
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offset = 0;
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for (i = 24; i <= next_fpr; i++)
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if (cfun_fpr_bit_p (i - 16))
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for (i = F8_REGNUM; i <= next_fpr; i++)
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if (cfun_fpr_save_p (i))
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{
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rtx addr = plus_constant (Pmode, stack_pointer_rtx,
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cfun_frame_layout.frame_size
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@ -8777,9 +8790,9 @@ s390_emit_epilogue (bool sibcall)
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if (cfun_save_high_fprs_p)
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{
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next_offset = cfun_frame_layout.f8_offset;
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for (i = 24; i < 32; i++)
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for (i = F8_REGNUM; i <= F15_REGNUM; i++)
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{
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if (cfun_fpr_bit_p (i - 16))
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if (cfun_fpr_save_p (i))
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{
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restore_fpr (frame_pointer,
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offset + next_offset, i);
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@ -8795,9 +8808,10 @@ s390_emit_epilogue (bool sibcall)
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else
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{
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next_offset = cfun_frame_layout.f4_offset;
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for (i = 18; i < 20; i++)
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/* f4, f6 */
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for (i = F4_REGNUM; i <= F4_REGNUM + 1; i++)
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{
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if (cfun_fpr_bit_p (i - 16))
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if (cfun_fpr_save_p (i))
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{
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restore_fpr (frame_pointer,
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offset + next_offset, i);
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@ -10504,18 +10518,18 @@ s390_conditional_register_usage (void)
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}
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if (TARGET_64BIT)
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{
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for (i = 24; i < 32; i++)
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for (i = F8_REGNUM; i <= F15_REGNUM; i++)
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call_used_regs[i] = call_really_used_regs[i] = 0;
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}
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else
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{
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for (i = 18; i < 20; i++)
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call_used_regs[i] = call_really_used_regs[i] = 0;
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call_used_regs[F4_REGNUM] = call_really_used_regs[F4_REGNUM] = 0;
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call_used_regs[F6_REGNUM] = call_really_used_regs[F6_REGNUM] = 0;
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}
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if (TARGET_SOFT_FLOAT)
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{
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for (i = 16; i < 32; i++)
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for (i = F0_REGNUM; i <= F15_REGNUM; i++)
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call_used_regs[i] = fixed_regs[i] = 1;
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}
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}
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@ -477,6 +477,23 @@ enum reg_class
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{ 0xffffffff, 0x0000003f }, /* ALL_REGS */ \
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}
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#define F0_REGNUM 16
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#define F1_REGNUM 20
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#define F2_REGNUM 17
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#define F3_REGNUM 21
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#define F4_REGNUM 18
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#define F5_REGNUM 22
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#define F6_REGNUM 19
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#define F7_REGNUM 23
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#define F8_REGNUM 24
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#define F9_REGNUM 25
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#define F10_REGNUM 26
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#define F11_REGNUM 27
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#define F12_REGNUM 28
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#define F13_REGNUM 29
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#define F14_REGNUM 30
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#define F15_REGNUM 31
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/* In some case register allocation order is not enough for IRA to
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generate a good code. The following macro (if defined) increases
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cost of REGNO for a pseudo approximately by pseudo usage frequency
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