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re PR target/53110 (GCC-4.7 generates stupid x86_64 asm) 

PR target/53110
	* config/i386/i386.md (and<mode>3): For andq $0xffffffff, reg
	instead expand it as zero extension.

From-SVN: r186839
This commit is contained in:
Jakub Jelinek 2012-04-25 21:40:31 +02:00 committed by Jakub Jelinek
parent ff5f00c3a1
commit c1d40097cb
2 changed files with 17 additions and 1 deletions
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6
gcc/ChangeLog
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@ -1,3 +1,9 @@
2012-04-25 Jakub Jelinek <jakub@redhat.com>
PR target/53110
* config/i386/i386.md (and<mode>3): For andq $0xffffffff, reg
instead expand it as zero extension.
2012-04-25 H.J. Lu <hongjiu.lu@intel.com>
PR debug/52857

12
gcc/config/i386/i386.md
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@ -7694,7 +7694,17 @@
(and:SWIM (match_operand:SWIM 1 "nonimmediate_operand")
(match_operand:SWIM 2 "<general_szext_operand>")))]
""
"ix86_expand_binary_operator (AND, <MODE>mode, operands); DONE;")
{
if (<MODE>mode == DImode
&& GET_CODE (operands[2]) == CONST_INT
&& INTVAL (operands[2]) == (HOST_WIDE_INT) 0xffffffff
&& REG_P (operands[1]))
emit_insn (gen_zero_extendsidi2 (operands[0],
gen_lowpart (SImode, operands[1])));
else
ix86_expand_binary_operator (AND, <MODE>mode, operands);
DONE;
})
(define_insn "*anddi_1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r,r")