git
/
gcc
mirror of git://gcc.gnu.org/git/gcc.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

expr.h (extract_bit_field): Remove packedp parameter. 

2013-09-28  Sandra Loosemore  <sandra@codesourcery.com>

	gcc/
	* expr.h (extract_bit_field): Remove packedp parameter.
	* expmed.c (extract_fixed_bit_field): Remove packedp parameter
	from forward declaration.
	(store_split_bit_field): Remove packedp arg from calls to
	extract_fixed_bit_field.
	(extract_bit_field_1): Remove packedp parameter and packedp
	argument from recursive calls and calls to extract_fixed_bit_field.
	(extract_bit_field): Remove packedp parameter and corresponding
	arg to extract_bit_field_1.
	(extract_fixed_bit_field): Remove packedp parameter.  Remove code
	to issue warnings.
	(extract_split_bit_field): Remove packedp arg from call to
	extract_fixed_bit_field.
	* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
	(copy_blkmode_from_reg): Likewise.
	(copy_blkmode_to_reg): Likewise.
	(read_complex_part): Likewise.
	(store_field): Likewise.
	(expand_expr_real_1): Likewise.
	* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
	to extract_bit_field.
	* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
	call to extract_bit_field.
	* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
	call to extract_bit_field.
	* doc/invoke.texi (Code Gen Options): Remove mention of warnings
	and special packedp behavior from -fstrict-volatile-bitfields
	documentation.

From-SVN: r203003
This commit is contained in:
Sandra Loosemore 2013-09-27 21:05:07 -04:00 committed by Sandra Loosemore
parent ec110af7d1
commit c6285bd7bb
8 changed files with 60 additions and 82 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

31
gcc/ChangeLog
View File

@ -1,3 +1,34 @@
2013-09-28 Sandra Loosemore <sandra@codesourcery.com>
* expr.h (extract_bit_field): Remove packedp parameter.
* expmed.c (extract_fixed_bit_field): Remove packedp parameter
from forward declaration.
(store_split_bit_field): Remove packedp arg from calls to
extract_fixed_bit_field.
(extract_bit_field_1): Remove packedp parameter and packedp
argument from recursive calls and calls to extract_fixed_bit_field.
(extract_bit_field): Remove packedp parameter and corresponding
arg to extract_bit_field_1.
(extract_fixed_bit_field): Remove packedp parameter. Remove code
to issue warnings.
(extract_split_bit_field): Remove packedp arg from call to
extract_fixed_bit_field.
* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
(copy_blkmode_from_reg): Likewise.
(copy_blkmode_to_reg): Likewise.
(read_complex_part): Likewise.
(store_field): Likewise.
(expand_expr_real_1): Likewise.
* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
to extract_bit_field.
* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
call to extract_bit_field.
* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
call to extract_bit_field.
* doc/invoke.texi (Code Gen Options): Remove mention of warnings
and special packedp behavior from -fstrict-volatile-bitfields
documentation.
2013-09-27 Jan-Benedict Glaw <jbglaw@lug-owl.de>
* lra-eliminations.c (init_elim_table): Guard value_p.

2
gcc/calls.c
View File

@ -1026,7 +1026,7 @@ store_unaligned_arguments_into_pseudos (struct arg_data *args, int num_actuals)
int bitsize = MIN (bytes * BITS_PER_UNIT, BITS_PER_WORD);
args[i].aligned_regs[j] = reg;
word = extract_bit_field (word, bitsize, 0, 1, false, NULL_RTX,
word = extract_bit_field (word, bitsize, 0, 1, NULL_RTX,
word_mode, word_mode);
/* There is no need to restrict this code to loading items

2
gcc/config/tilegx/tilegx.c
View File

@ -1872,7 +1872,7 @@ tilegx_expand_unaligned_load (rtx dest_reg, rtx mem, HOST_WIDE_INT bitsize,
rtx extracted =
extract_bit_field (gen_lowpart (DImode, wide_result),
bitsize, bit_offset % BITS_PER_UNIT,
!sign, false, gen_lowpart (DImode, dest_reg),
!sign, gen_lowpart (DImode, dest_reg),
DImode, DImode);
if (extracted != dest_reg)

2
gcc/config/tilepro/tilepro.c
View File

@ -1676,7 +1676,7 @@ tilepro_expand_unaligned_load (rtx dest_reg, rtx mem, HOST_WIDE_INT bitsize,
rtx extracted =
extract_bit_field (gen_lowpart (SImode, wide_result),
bitsize, bit_offset % BITS_PER_UNIT,
!sign, false, gen_lowpart (SImode, dest_reg),
!sign, gen_lowpart (SImode, dest_reg),
SImode, SImode);
if (extracted != dest_reg)

8
gcc/doc/invoke.texi
View File

@ -21169,14 +21169,6 @@ instruction, even though that accesses bytes that do not contain
any portion of the bit-field, or memory-mapped registers unrelated to
the one being updated.
If the target requires strict alignment, and honoring the field
type would require violating this alignment, a warning is issued.
If the field has @code{packed} attribute, the access is done without
honoring the field type. If the field doesn't have @code{packed}
attribute, the access is done honoring the field type. In both cases,
GCC assumes that the user knows something about the target hardware
that it is unaware of.
The default value of this option is determined by the application binary
interface for the target processor.

69
gcc/expmed.c
View File

@ -54,7 +54,7 @@ static void store_split_bit_field (rtx, unsigned HOST_WIDE_INT,
rtx);
static rtx extract_fixed_bit_field (enum machine_mode, rtx,
unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT, rtx, int, bool);
unsigned HOST_WIDE_INT, rtx, int);
static rtx mask_rtx (enum machine_mode, int, int, int);
static rtx lshift_value (enum machine_mode, unsigned HOST_WIDE_INT, int);
static rtx extract_split_bit_field (rtx, unsigned HOST_WIDE_INT,
@ -1128,7 +1128,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
endianness compensation) to fetch the piece we want. */
part = extract_fixed_bit_field (word_mode, value, thissize,
total_bits - bitsize + bitsdone,
NULL_RTX, 1, false);
NULL_RTX, 1);
}
}
else
@ -1140,7 +1140,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
& (((HOST_WIDE_INT) 1 << thissize) - 1));
else
part = extract_fixed_bit_field (word_mode, value, thissize,
bitsdone, NULL_RTX, 1, false);
bitsdone, NULL_RTX, 1);
}
/* If OP0 is a register, then handle OFFSET here.
@ -1301,8 +1301,7 @@ extract_bit_field_using_extv (const extraction_insn *extv, rtx op0,
static rtx
extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
unsigned HOST_WIDE_INT bitnum,
int unsignedp, bool packedp, rtx target,
unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
enum machine_mode mode, enum machine_mode tmode,
bool fallback_p)
{
@ -1517,7 +1516,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
rtx result_part
= extract_bit_field_1 (op0, MIN (BITS_PER_WORD,
bitsize - i * BITS_PER_WORD),
bitnum + bit_offset, 1, false, target_part,
bitnum + bit_offset, 1, target_part,
mode, word_mode, fallback_p);
gcc_assert (target_part);
@ -1621,7 +1620,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
{
xop0 = copy_to_reg (xop0);
rtx result = extract_bit_field_1 (xop0, bitsize, bitpos,
unsignedp, packedp, target,
unsignedp, target,
mode, tmode, false);
if (result)
return result;
@ -1641,7 +1640,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
gcc_assert (int_mode != BLKmode);
target = extract_fixed_bit_field (int_mode, op0, bitsize, bitnum,
target, unsignedp, packedp);
target, unsignedp);
return convert_extracted_bit_field (target, mode, tmode, unsignedp);
}
@ -1652,7 +1651,6 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
STR_RTX is the structure containing the byte (a REG or MEM).
UNSIGNEDP is nonzero if this is an unsigned bit field.
PACKEDP is nonzero if the field has the packed attribute.
MODE is the natural mode of the field value once extracted.
TMODE is the mode the caller would like the value to have;
but the value may be returned with type MODE instead.
@ -1664,10 +1662,10 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
rtx
extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
unsigned HOST_WIDE_INT bitnum, int unsignedp, bool packedp,
rtx target, enum machine_mode mode, enum machine_mode tmode)
unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
enum machine_mode mode, enum machine_mode tmode)
{
return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp, packedp,
return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp,
target, mode, tmode, true);
}
@ -1675,8 +1673,6 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
from bit BITNUM of OP0.
UNSIGNEDP is nonzero for an unsigned bit field (don't sign-extend value).
PACKEDP is true if the field has the packed attribute.
If TARGET is nonzero, attempts to store the value there
and return TARGET, but this is not guaranteed.
If TARGET is not used, create a pseudo-reg of mode TMODE for the value. */
@ -1685,7 +1681,7 @@ static rtx
extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
unsigned HOST_WIDE_INT bitsize,
unsigned HOST_WIDE_INT bitnum, rtx target,
int unsignedp, bool packedp)
int unsignedp)
{
enum machine_mode mode;
@ -1726,45 +1722,10 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
&& bitnum % BITS_PER_UNIT + bitsize <= total_bits
&& bitnum % GET_MODE_BITSIZE (mode) + bitsize > total_bits)
{
/* If the target doesn't support unaligned access, give up and
split the access into two. */
if (STRICT_ALIGNMENT)
{
static bool informed_about_misalignment = false;
if (packedp)
{
if (bitsize == total_bits)
warning_at (input_location, OPT_fstrict_volatile_bitfields,
"multiple accesses to volatile structure"
" member because of packed attribute");
else
warning_at (input_location, OPT_fstrict_volatile_bitfields,
"multiple accesses to volatile structure"
" bitfield because of packed attribute");
return extract_split_bit_field (op0, bitsize, bitnum,
unsignedp);
}
if (bitsize == total_bits)
warning_at (input_location, OPT_fstrict_volatile_bitfields,
"mis-aligned access used for structure member");
else
warning_at (input_location, OPT_fstrict_volatile_bitfields,
"mis-aligned access used for structure bitfield");
if (! informed_about_misalignment)
{
informed_about_misalignment = true;
inform (input_location,
"when a volatile object spans multiple type-sized"
" locations, the compiler must choose between using"
" a single mis-aligned access to preserve the"
" volatility, or using multiple aligned accesses"
" to avoid runtime faults; this code may fail at"
" runtime if the hardware does not allow this"
" access");
}
}
return extract_split_bit_field (op0, bitsize, bitnum, unsignedp);
bit_offset = bitnum - bitnum % BITS_PER_UNIT;
}
op0 = adjust_bitfield_address (op0, mode, bit_offset / BITS_PER_UNIT);
@ -1940,7 +1901,7 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
whose meaning is determined by BYTES_PER_UNIT.
OFFSET is in UNITs, and UNIT is in bits. */
part = extract_fixed_bit_field (word_mode, word, thissize,
offset * unit + thispos, 0, 1, false);
offset * unit + thispos, 0, 1);
bitsdone += thissize;
/* Shift this part into place for the result. */

26
gcc/expr.c
View File

@ -1710,7 +1710,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
&& (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
(bytepos % slen0) * BITS_PER_UNIT,
1, false, NULL_RTX, mode, mode);
1, NULL_RTX, mode, mode);
}
else
{
@ -1720,7 +1720,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
mem = assign_stack_temp (GET_MODE (src), slen);
emit_move_insn (mem, src);
tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
0, 1, false, NULL_RTX, mode, mode);
0, 1, NULL_RTX, mode, mode);
}
}
/* FIXME: A SIMD parallel will eventually lead to a subreg of a
@ -1761,7 +1761,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
tmps[i] = src;
else
tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
bytepos * BITS_PER_UNIT, 1, NULL_RTX,
mode, mode);
if (shift)
@ -2204,7 +2204,7 @@ copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
bitpos for the destination store (left justified). */
store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
extract_bit_field (src, bitsize,
xbitpos % BITS_PER_WORD, 1, false,
xbitpos % BITS_PER_WORD, 1,
NULL_RTX, copy_mode, copy_mode));
}
}
@ -2281,7 +2281,7 @@ copy_blkmode_to_reg (enum machine_mode mode, tree src)
store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
0, 0, word_mode,
extract_bit_field (src_word, bitsize,
bitpos % BITS_PER_WORD, 1, false,
bitpos % BITS_PER_WORD, 1,
NULL_RTX, word_mode, word_mode));
}
@ -3029,7 +3029,7 @@ read_complex_part (rtx cplx, bool imag_p)
}
return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
true, false, NULL_RTX, imode, imode);
true, NULL_RTX, imode, imode);
}
/* A subroutine of emit_move_insn_1. Yet another lowpart generator.
@ -6470,7 +6470,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
temp_target = gen_reg_rtx (mode);
temp_target
= extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
false, temp_target, mode, mode);
temp_target, mode, mode);
temp = temp_target;
}
}
@ -9672,8 +9672,8 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
else if (SLOW_UNALIGNED_ACCESS (mode, align))
temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
0, TYPE_UNSIGNED (TREE_TYPE (exp)),
true, (modifier == EXPAND_STACK_PARM
? NULL_RTX : target),
(modifier == EXPAND_STACK_PARM
? NULL_RTX : target),
mode, mode);
}
return temp;
@ -9864,7 +9864,6 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
HOST_WIDE_INT bitsize, bitpos;
tree offset;
int volatilep = 0, must_force_mem;
bool packedp = false;
tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
&mode1, &unsignedp, &volatilep, true);
rtx orig_op0, memloc;
@ -9875,11 +9874,6 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
infinitely recurse. */
gcc_assert (tem != exp);
if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
|| (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
&& DECL_PACKED (TREE_OPERAND (exp, 1))))
packedp = true;
/* If TEM's type is a union of variable size, pass TARGET to the inner
computation, since it will need a temporary and TARGET is known
to have to do. This occurs in unchecked conversion in Ada. */
@ -10104,7 +10098,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
(modifier == EXPAND_STACK_PARM
? NULL_RTX : target),
ext_mode, ext_mode);

2
gcc/expr.h
View File

@ -704,7 +704,7 @@ extern void store_bit_field (rtx, unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT,
enum machine_mode, rtx);
extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT,
unsigned HOST_WIDE_INT, int, bool, rtx,
unsigned HOST_WIDE_INT, int, rtx,
enum machine_mode, enum machine_mode);
extern rtx extract_low_bits (enum machine_mode, enum machine_mode, rtx);
extern rtx expand_mult (enum machine_mode, rtx, rtx, rtx, int);