mirror of git://gcc.gnu.org/git/gcc.git
expr.h (extract_bit_field): Remove packedp parameter.
2013-09-28 Sandra Loosemore <sandra@codesourcery.com> gcc/ * expr.h (extract_bit_field): Remove packedp parameter. * expmed.c (extract_fixed_bit_field): Remove packedp parameter from forward declaration. (store_split_bit_field): Remove packedp arg from calls to extract_fixed_bit_field. (extract_bit_field_1): Remove packedp parameter and packedp argument from recursive calls and calls to extract_fixed_bit_field. (extract_bit_field): Remove packedp parameter and corresponding arg to extract_bit_field_1. (extract_fixed_bit_field): Remove packedp parameter. Remove code to issue warnings. (extract_split_bit_field): Remove packedp arg from call to extract_fixed_bit_field. * expr.c (emit_group_load_1): Adjust calls to extract_bit_field. (copy_blkmode_from_reg): Likewise. (copy_blkmode_to_reg): Likewise. (read_complex_part): Likewise. (store_field): Likewise. (expand_expr_real_1): Likewise. * calls.c (store_unaligned_arguments_into_pseudos): Adjust call to extract_bit_field. * config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust call to extract_bit_field. * config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust call to extract_bit_field. * doc/invoke.texi (Code Gen Options): Remove mention of warnings and special packedp behavior from -fstrict-volatile-bitfields documentation. From-SVN: r203003
This commit is contained in:
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c6285bd7bb
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@ -1,3 +1,34 @@
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2013-09-28 Sandra Loosemore <sandra@codesourcery.com>
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* expr.h (extract_bit_field): Remove packedp parameter.
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* expmed.c (extract_fixed_bit_field): Remove packedp parameter
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from forward declaration.
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(store_split_bit_field): Remove packedp arg from calls to
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extract_fixed_bit_field.
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(extract_bit_field_1): Remove packedp parameter and packedp
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argument from recursive calls and calls to extract_fixed_bit_field.
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(extract_bit_field): Remove packedp parameter and corresponding
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arg to extract_bit_field_1.
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(extract_fixed_bit_field): Remove packedp parameter. Remove code
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to issue warnings.
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(extract_split_bit_field): Remove packedp arg from call to
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extract_fixed_bit_field.
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* expr.c (emit_group_load_1): Adjust calls to extract_bit_field.
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(copy_blkmode_from_reg): Likewise.
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(copy_blkmode_to_reg): Likewise.
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(read_complex_part): Likewise.
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(store_field): Likewise.
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(expand_expr_real_1): Likewise.
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* calls.c (store_unaligned_arguments_into_pseudos): Adjust call
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to extract_bit_field.
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* config/tilegx/tilegx.c (tilegx_expand_unaligned_load): Adjust
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call to extract_bit_field.
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* config/tilepro/tilepro.c (tilepro_expand_unaligned_load): Adjust
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call to extract_bit_field.
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* doc/invoke.texi (Code Gen Options): Remove mention of warnings
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and special packedp behavior from -fstrict-volatile-bitfields
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documentation.
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2013-09-27 Jan-Benedict Glaw <jbglaw@lug-owl.de>
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2013-09-27 Jan-Benedict Glaw <jbglaw@lug-owl.de>
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* lra-eliminations.c (init_elim_table): Guard value_p.
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* lra-eliminations.c (init_elim_table): Guard value_p.
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@ -1026,7 +1026,7 @@ store_unaligned_arguments_into_pseudos (struct arg_data *args, int num_actuals)
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int bitsize = MIN (bytes * BITS_PER_UNIT, BITS_PER_WORD);
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int bitsize = MIN (bytes * BITS_PER_UNIT, BITS_PER_WORD);
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args[i].aligned_regs[j] = reg;
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args[i].aligned_regs[j] = reg;
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word = extract_bit_field (word, bitsize, 0, 1, false, NULL_RTX,
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word = extract_bit_field (word, bitsize, 0, 1, NULL_RTX,
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word_mode, word_mode);
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word_mode, word_mode);
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/* There is no need to restrict this code to loading items
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/* There is no need to restrict this code to loading items
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@ -1872,7 +1872,7 @@ tilegx_expand_unaligned_load (rtx dest_reg, rtx mem, HOST_WIDE_INT bitsize,
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rtx extracted =
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rtx extracted =
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extract_bit_field (gen_lowpart (DImode, wide_result),
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extract_bit_field (gen_lowpart (DImode, wide_result),
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bitsize, bit_offset % BITS_PER_UNIT,
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bitsize, bit_offset % BITS_PER_UNIT,
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!sign, false, gen_lowpart (DImode, dest_reg),
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!sign, gen_lowpart (DImode, dest_reg),
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DImode, DImode);
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DImode, DImode);
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if (extracted != dest_reg)
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if (extracted != dest_reg)
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@ -1676,7 +1676,7 @@ tilepro_expand_unaligned_load (rtx dest_reg, rtx mem, HOST_WIDE_INT bitsize,
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rtx extracted =
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rtx extracted =
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extract_bit_field (gen_lowpart (SImode, wide_result),
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extract_bit_field (gen_lowpart (SImode, wide_result),
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bitsize, bit_offset % BITS_PER_UNIT,
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bitsize, bit_offset % BITS_PER_UNIT,
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!sign, false, gen_lowpart (SImode, dest_reg),
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!sign, gen_lowpart (SImode, dest_reg),
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SImode, SImode);
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SImode, SImode);
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if (extracted != dest_reg)
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if (extracted != dest_reg)
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@ -21169,14 +21169,6 @@ instruction, even though that accesses bytes that do not contain
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any portion of the bit-field, or memory-mapped registers unrelated to
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any portion of the bit-field, or memory-mapped registers unrelated to
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the one being updated.
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the one being updated.
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If the target requires strict alignment, and honoring the field
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type would require violating this alignment, a warning is issued.
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If the field has @code{packed} attribute, the access is done without
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honoring the field type. If the field doesn't have @code{packed}
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attribute, the access is done honoring the field type. In both cases,
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GCC assumes that the user knows something about the target hardware
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that it is unaware of.
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The default value of this option is determined by the application binary
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The default value of this option is determined by the application binary
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interface for the target processor.
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interface for the target processor.
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69
gcc/expmed.c
69
gcc/expmed.c
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@ -54,7 +54,7 @@ static void store_split_bit_field (rtx, unsigned HOST_WIDE_INT,
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rtx);
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rtx);
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static rtx extract_fixed_bit_field (enum machine_mode, rtx,
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static rtx extract_fixed_bit_field (enum machine_mode, rtx,
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unsigned HOST_WIDE_INT,
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unsigned HOST_WIDE_INT,
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unsigned HOST_WIDE_INT, rtx, int, bool);
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unsigned HOST_WIDE_INT, rtx, int);
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static rtx mask_rtx (enum machine_mode, int, int, int);
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static rtx mask_rtx (enum machine_mode, int, int, int);
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static rtx lshift_value (enum machine_mode, unsigned HOST_WIDE_INT, int);
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static rtx lshift_value (enum machine_mode, unsigned HOST_WIDE_INT, int);
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static rtx extract_split_bit_field (rtx, unsigned HOST_WIDE_INT,
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static rtx extract_split_bit_field (rtx, unsigned HOST_WIDE_INT,
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@ -1128,7 +1128,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
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endianness compensation) to fetch the piece we want. */
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endianness compensation) to fetch the piece we want. */
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part = extract_fixed_bit_field (word_mode, value, thissize,
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part = extract_fixed_bit_field (word_mode, value, thissize,
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total_bits - bitsize + bitsdone,
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total_bits - bitsize + bitsdone,
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NULL_RTX, 1, false);
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NULL_RTX, 1);
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}
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}
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}
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}
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else
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else
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@ -1140,7 +1140,7 @@ store_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
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& (((HOST_WIDE_INT) 1 << thissize) - 1));
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& (((HOST_WIDE_INT) 1 << thissize) - 1));
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else
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else
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part = extract_fixed_bit_field (word_mode, value, thissize,
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part = extract_fixed_bit_field (word_mode, value, thissize,
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bitsdone, NULL_RTX, 1, false);
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bitsdone, NULL_RTX, 1);
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}
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}
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/* If OP0 is a register, then handle OFFSET here.
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/* If OP0 is a register, then handle OFFSET here.
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@ -1301,8 +1301,7 @@ extract_bit_field_using_extv (const extraction_insn *extv, rtx op0,
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static rtx
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static rtx
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extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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unsigned HOST_WIDE_INT bitnum,
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unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
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int unsignedp, bool packedp, rtx target,
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enum machine_mode mode, enum machine_mode tmode,
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enum machine_mode mode, enum machine_mode tmode,
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bool fallback_p)
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bool fallback_p)
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{
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{
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@ -1517,7 +1516,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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rtx result_part
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rtx result_part
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= extract_bit_field_1 (op0, MIN (BITS_PER_WORD,
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= extract_bit_field_1 (op0, MIN (BITS_PER_WORD,
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bitsize - i * BITS_PER_WORD),
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bitsize - i * BITS_PER_WORD),
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bitnum + bit_offset, 1, false, target_part,
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bitnum + bit_offset, 1, target_part,
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mode, word_mode, fallback_p);
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mode, word_mode, fallback_p);
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gcc_assert (target_part);
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gcc_assert (target_part);
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@ -1621,7 +1620,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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{
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{
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xop0 = copy_to_reg (xop0);
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xop0 = copy_to_reg (xop0);
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rtx result = extract_bit_field_1 (xop0, bitsize, bitpos,
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rtx result = extract_bit_field_1 (xop0, bitsize, bitpos,
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unsignedp, packedp, target,
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unsignedp, target,
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mode, tmode, false);
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mode, tmode, false);
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if (result)
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if (result)
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return result;
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return result;
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@ -1641,7 +1640,7 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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gcc_assert (int_mode != BLKmode);
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gcc_assert (int_mode != BLKmode);
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target = extract_fixed_bit_field (int_mode, op0, bitsize, bitnum,
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target = extract_fixed_bit_field (int_mode, op0, bitsize, bitnum,
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target, unsignedp, packedp);
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target, unsignedp);
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return convert_extracted_bit_field (target, mode, tmode, unsignedp);
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return convert_extracted_bit_field (target, mode, tmode, unsignedp);
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}
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}
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@ -1652,7 +1651,6 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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STR_RTX is the structure containing the byte (a REG or MEM).
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STR_RTX is the structure containing the byte (a REG or MEM).
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UNSIGNEDP is nonzero if this is an unsigned bit field.
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UNSIGNEDP is nonzero if this is an unsigned bit field.
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PACKEDP is nonzero if the field has the packed attribute.
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MODE is the natural mode of the field value once extracted.
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MODE is the natural mode of the field value once extracted.
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TMODE is the mode the caller would like the value to have;
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TMODE is the mode the caller would like the value to have;
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but the value may be returned with type MODE instead.
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but the value may be returned with type MODE instead.
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@ -1664,10 +1662,10 @@ extract_bit_field_1 (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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rtx
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rtx
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extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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unsigned HOST_WIDE_INT bitnum, int unsignedp, bool packedp,
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unsigned HOST_WIDE_INT bitnum, int unsignedp, rtx target,
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rtx target, enum machine_mode mode, enum machine_mode tmode)
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enum machine_mode mode, enum machine_mode tmode)
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{
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{
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return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp, packedp,
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return extract_bit_field_1 (str_rtx, bitsize, bitnum, unsignedp,
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target, mode, tmode, true);
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target, mode, tmode, true);
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}
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}
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@ -1675,8 +1673,6 @@ extract_bit_field (rtx str_rtx, unsigned HOST_WIDE_INT bitsize,
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from bit BITNUM of OP0.
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from bit BITNUM of OP0.
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UNSIGNEDP is nonzero for an unsigned bit field (don't sign-extend value).
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UNSIGNEDP is nonzero for an unsigned bit field (don't sign-extend value).
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PACKEDP is true if the field has the packed attribute.
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If TARGET is nonzero, attempts to store the value there
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If TARGET is nonzero, attempts to store the value there
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and return TARGET, but this is not guaranteed.
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and return TARGET, but this is not guaranteed.
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If TARGET is not used, create a pseudo-reg of mode TMODE for the value. */
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If TARGET is not used, create a pseudo-reg of mode TMODE for the value. */
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@ -1685,7 +1681,7 @@ static rtx
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extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
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extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
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unsigned HOST_WIDE_INT bitsize,
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unsigned HOST_WIDE_INT bitsize,
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unsigned HOST_WIDE_INT bitnum, rtx target,
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unsigned HOST_WIDE_INT bitnum, rtx target,
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int unsignedp, bool packedp)
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int unsignedp)
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{
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{
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enum machine_mode mode;
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enum machine_mode mode;
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@ -1726,45 +1722,10 @@ extract_fixed_bit_field (enum machine_mode tmode, rtx op0,
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&& bitnum % BITS_PER_UNIT + bitsize <= total_bits
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&& bitnum % BITS_PER_UNIT + bitsize <= total_bits
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&& bitnum % GET_MODE_BITSIZE (mode) + bitsize > total_bits)
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&& bitnum % GET_MODE_BITSIZE (mode) + bitsize > total_bits)
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{
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{
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/* If the target doesn't support unaligned access, give up and
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split the access into two. */
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if (STRICT_ALIGNMENT)
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if (STRICT_ALIGNMENT)
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{
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return extract_split_bit_field (op0, bitsize, bitnum, unsignedp);
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static bool informed_about_misalignment = false;
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if (packedp)
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{
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if (bitsize == total_bits)
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warning_at (input_location, OPT_fstrict_volatile_bitfields,
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"multiple accesses to volatile structure"
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" member because of packed attribute");
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else
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warning_at (input_location, OPT_fstrict_volatile_bitfields,
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"multiple accesses to volatile structure"
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" bitfield because of packed attribute");
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return extract_split_bit_field (op0, bitsize, bitnum,
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unsignedp);
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}
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if (bitsize == total_bits)
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warning_at (input_location, OPT_fstrict_volatile_bitfields,
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"mis-aligned access used for structure member");
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else
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warning_at (input_location, OPT_fstrict_volatile_bitfields,
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"mis-aligned access used for structure bitfield");
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if (! informed_about_misalignment)
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{
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informed_about_misalignment = true;
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inform (input_location,
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"when a volatile object spans multiple type-sized"
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" locations, the compiler must choose between using"
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" a single mis-aligned access to preserve the"
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" volatility, or using multiple aligned accesses"
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" to avoid runtime faults; this code may fail at"
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" runtime if the hardware does not allow this"
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" access");
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}
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}
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bit_offset = bitnum - bitnum % BITS_PER_UNIT;
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bit_offset = bitnum - bitnum % BITS_PER_UNIT;
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}
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}
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op0 = adjust_bitfield_address (op0, mode, bit_offset / BITS_PER_UNIT);
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op0 = adjust_bitfield_address (op0, mode, bit_offset / BITS_PER_UNIT);
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@ -1940,7 +1901,7 @@ extract_split_bit_field (rtx op0, unsigned HOST_WIDE_INT bitsize,
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whose meaning is determined by BYTES_PER_UNIT.
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whose meaning is determined by BYTES_PER_UNIT.
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OFFSET is in UNITs, and UNIT is in bits. */
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OFFSET is in UNITs, and UNIT is in bits. */
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part = extract_fixed_bit_field (word_mode, word, thissize,
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part = extract_fixed_bit_field (word_mode, word, thissize,
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offset * unit + thispos, 0, 1, false);
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offset * unit + thispos, 0, 1);
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bitsdone += thissize;
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bitsdone += thissize;
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/* Shift this part into place for the result. */
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/* Shift this part into place for the result. */
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24
gcc/expr.c
24
gcc/expr.c
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@ -1710,7 +1710,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
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&& (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
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&& (!REG_P (tmps[i]) || GET_MODE (tmps[i]) != mode))
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tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
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tmps[i] = extract_bit_field (tmps[i], bytelen * BITS_PER_UNIT,
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(bytepos % slen0) * BITS_PER_UNIT,
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(bytepos % slen0) * BITS_PER_UNIT,
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1, false, NULL_RTX, mode, mode);
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1, NULL_RTX, mode, mode);
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}
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}
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else
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else
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{
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{
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@ -1720,7 +1720,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
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mem = assign_stack_temp (GET_MODE (src), slen);
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mem = assign_stack_temp (GET_MODE (src), slen);
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emit_move_insn (mem, src);
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emit_move_insn (mem, src);
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tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
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tmps[i] = extract_bit_field (mem, bytelen * BITS_PER_UNIT,
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0, 1, false, NULL_RTX, mode, mode);
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0, 1, NULL_RTX, mode, mode);
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}
|
}
|
||||||
}
|
}
|
||||||
/* FIXME: A SIMD parallel will eventually lead to a subreg of a
|
/* FIXME: A SIMD parallel will eventually lead to a subreg of a
|
||||||
|
|
@ -1761,7 +1761,7 @@ emit_group_load_1 (rtx *tmps, rtx dst, rtx orig_src, tree type, int ssize)
|
||||||
tmps[i] = src;
|
tmps[i] = src;
|
||||||
else
|
else
|
||||||
tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
|
tmps[i] = extract_bit_field (src, bytelen * BITS_PER_UNIT,
|
||||||
bytepos * BITS_PER_UNIT, 1, false, NULL_RTX,
|
bytepos * BITS_PER_UNIT, 1, NULL_RTX,
|
||||||
mode, mode);
|
mode, mode);
|
||||||
|
|
||||||
if (shift)
|
if (shift)
|
||||||
|
|
@ -2204,7 +2204,7 @@ copy_blkmode_from_reg (rtx target, rtx srcreg, tree type)
|
||||||
bitpos for the destination store (left justified). */
|
bitpos for the destination store (left justified). */
|
||||||
store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
|
store_bit_field (dst, bitsize, bitpos % BITS_PER_WORD, 0, 0, copy_mode,
|
||||||
extract_bit_field (src, bitsize,
|
extract_bit_field (src, bitsize,
|
||||||
xbitpos % BITS_PER_WORD, 1, false,
|
xbitpos % BITS_PER_WORD, 1,
|
||||||
NULL_RTX, copy_mode, copy_mode));
|
NULL_RTX, copy_mode, copy_mode));
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -2281,7 +2281,7 @@ copy_blkmode_to_reg (enum machine_mode mode, tree src)
|
||||||
store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
|
store_bit_field (dst_word, bitsize, xbitpos % BITS_PER_WORD,
|
||||||
0, 0, word_mode,
|
0, 0, word_mode,
|
||||||
extract_bit_field (src_word, bitsize,
|
extract_bit_field (src_word, bitsize,
|
||||||
bitpos % BITS_PER_WORD, 1, false,
|
bitpos % BITS_PER_WORD, 1,
|
||||||
NULL_RTX, word_mode, word_mode));
|
NULL_RTX, word_mode, word_mode));
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -3029,7 +3029,7 @@ read_complex_part (rtx cplx, bool imag_p)
|
||||||
}
|
}
|
||||||
|
|
||||||
return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
|
return extract_bit_field (cplx, ibitsize, imag_p ? ibitsize : 0,
|
||||||
true, false, NULL_RTX, imode, imode);
|
true, NULL_RTX, imode, imode);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* A subroutine of emit_move_insn_1. Yet another lowpart generator.
|
/* A subroutine of emit_move_insn_1. Yet another lowpart generator.
|
||||||
|
|
@ -6470,7 +6470,7 @@ store_field (rtx target, HOST_WIDE_INT bitsize, HOST_WIDE_INT bitpos,
|
||||||
temp_target = gen_reg_rtx (mode);
|
temp_target = gen_reg_rtx (mode);
|
||||||
temp_target
|
temp_target
|
||||||
= extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
|
= extract_bit_field (temp, size * BITS_PER_UNIT, 0, 1,
|
||||||
false, temp_target, mode, mode);
|
temp_target, mode, mode);
|
||||||
temp = temp_target;
|
temp = temp_target;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
@ -9672,7 +9672,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
|
||||||
else if (SLOW_UNALIGNED_ACCESS (mode, align))
|
else if (SLOW_UNALIGNED_ACCESS (mode, align))
|
||||||
temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
|
temp = extract_bit_field (temp, GET_MODE_BITSIZE (mode),
|
||||||
0, TYPE_UNSIGNED (TREE_TYPE (exp)),
|
0, TYPE_UNSIGNED (TREE_TYPE (exp)),
|
||||||
true, (modifier == EXPAND_STACK_PARM
|
(modifier == EXPAND_STACK_PARM
|
||||||
? NULL_RTX : target),
|
? NULL_RTX : target),
|
||||||
mode, mode);
|
mode, mode);
|
||||||
}
|
}
|
||||||
|
|
@ -9864,7 +9864,6 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
|
||||||
HOST_WIDE_INT bitsize, bitpos;
|
HOST_WIDE_INT bitsize, bitpos;
|
||||||
tree offset;
|
tree offset;
|
||||||
int volatilep = 0, must_force_mem;
|
int volatilep = 0, must_force_mem;
|
||||||
bool packedp = false;
|
|
||||||
tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
|
tree tem = get_inner_reference (exp, &bitsize, &bitpos, &offset,
|
||||||
&mode1, &unsignedp, &volatilep, true);
|
&mode1, &unsignedp, &volatilep, true);
|
||||||
rtx orig_op0, memloc;
|
rtx orig_op0, memloc;
|
||||||
|
|
@ -9875,11 +9874,6 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
|
||||||
infinitely recurse. */
|
infinitely recurse. */
|
||||||
gcc_assert (tem != exp);
|
gcc_assert (tem != exp);
|
||||||
|
|
||||||
if (TYPE_PACKED (TREE_TYPE (TREE_OPERAND (exp, 0)))
|
|
||||||
|| (TREE_CODE (TREE_OPERAND (exp, 1)) == FIELD_DECL
|
|
||||||
&& DECL_PACKED (TREE_OPERAND (exp, 1))))
|
|
||||||
packedp = true;
|
|
||||||
|
|
||||||
/* If TEM's type is a union of variable size, pass TARGET to the inner
|
/* If TEM's type is a union of variable size, pass TARGET to the inner
|
||||||
computation, since it will need a temporary and TARGET is known
|
computation, since it will need a temporary and TARGET is known
|
||||||
to have to do. This occurs in unchecked conversion in Ada. */
|
to have to do. This occurs in unchecked conversion in Ada. */
|
||||||
|
|
@ -10104,7 +10098,7 @@ expand_expr_real_1 (tree exp, rtx target, enum machine_mode tmode,
|
||||||
if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
|
if (MEM_P (op0) && REG_P (XEXP (op0, 0)))
|
||||||
mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
|
mark_reg_pointer (XEXP (op0, 0), MEM_ALIGN (op0));
|
||||||
|
|
||||||
op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp, packedp,
|
op0 = extract_bit_field (op0, bitsize, bitpos, unsignedp,
|
||||||
(modifier == EXPAND_STACK_PARM
|
(modifier == EXPAND_STACK_PARM
|
||||||
? NULL_RTX : target),
|
? NULL_RTX : target),
|
||||||
ext_mode, ext_mode);
|
ext_mode, ext_mode);
|
||||||
|
|
|
||||||
|
|
@ -704,7 +704,7 @@ extern void store_bit_field (rtx, unsigned HOST_WIDE_INT,
|
||||||
unsigned HOST_WIDE_INT,
|
unsigned HOST_WIDE_INT,
|
||||||
enum machine_mode, rtx);
|
enum machine_mode, rtx);
|
||||||
extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT,
|
extern rtx extract_bit_field (rtx, unsigned HOST_WIDE_INT,
|
||||||
unsigned HOST_WIDE_INT, int, bool, rtx,
|
unsigned HOST_WIDE_INT, int, rtx,
|
||||||
enum machine_mode, enum machine_mode);
|
enum machine_mode, enum machine_mode);
|
||||||
extern rtx extract_low_bits (enum machine_mode, enum machine_mode, rtx);
|
extern rtx extract_low_bits (enum machine_mode, enum machine_mode, rtx);
|
||||||
extern rtx expand_mult (enum machine_mode, rtx, rtx, rtx, int);
|
extern rtx expand_mult (enum machine_mode, rtx, rtx, rtx, int);
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue